LM12L458
www.ti.com
SNAS085B– JULY1999– REVISEDMARCH2013
LM12L45812-Bit+SignDataAcquisitionSystemwithSelf-Calibration
CheckforSamples:LM12L458
1
FEATURES
DESCRIPTION
The LM12L458 is a highly integrated 3.3V V Data
2
• ThreeOperatingModes:12-Bit+Sign,8-Bit+
Acquisition System. It combines s a a fully-differential
Sign,and“ Watchdog”
self-calibrating (correcting g linearity and zero errors)
• Single-EndedorDifferentialInputs
13-bit(12-bit+sign)analog-to-digitalconverter(ADC)
• Built-InSample-and-Hold
and sample-and-hold (S/H) with extensive e analog
functions and d digital functionality. . Up to 32
• InstructionRAMandEventSequencer
consecutive conversions, using two's complement
• 8-ChannelMultiplexer
format, can be stored in an internal l 32-word (16-bit
• 32-WordConversionFIFO
wide)FIFOdatabuffer.Aninternal8-wordRAMcan
store the conversion n sequence for r up to o eight
• ProgrammableAcquisitionTimesand
acquisitions through the e LM12L458's eight-input
ConversionRates
multiplexer. TheLM12L458canalsooperatewith8-
• Self-CalibrationandDiagnosticMode
bit+signresolutionandinasupervisory“watchdog”
• 8-or16-BitWideDataBusMicroprocessoror
mode that t compares s an input t signal against two
DSPInterface
programmablelimits.Programmableacquisitiontimes
andconversionratesarepossiblethroughtheuseof
• CMOSCompatibleI/O
internalclock-driventimers.
APPLICATIONS
Allregisters,RAM,andFIFOaredirectlyaddressable
through the high speed microprocessor interface to
• DataLogging
either an 8-bit t or r 16-bit t data a bus. . The e LM12L458
• ProcessControl
includesadirectmemoryaccess(DMA)interfacefor
high-speedconversiondatatransfer.
• EnergyManagement
• MedicalInstrumentation
Additional applications information n can be found in
applications notes s AN-906 6 (JAJA265), AN-947
KEYSPECIFICATIONS
(SNAA012),andAN-949(SNAA013).
• (f
CLK
=6MHz)
• Resolution:12-Bit+Signor8-Bit+Sign
• SingleSupply:+3to+5.5V
• 13-bitConversionTime:7.3
μ
s
• 9-bitConversionTime:3.5
μ
s
• 13-bitThrough-PutRate:106kSamples/s
(Min)
• ComparisonTime(“ “ Watchdog” ” Mode):1.8
μ
s
(Max)
• ILE:±1LSB(Max)
• PowerConsumption:15mW(max)
• Stand-ByMode:5
μ
W(typ)
1
Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsof
TexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet.
2
Alltrademarksarethepropertyoftheirrespectiveowners.
PRODUCTIONDATAinformationiscurrentasofpublicationdate.
Copyright©1999– 2013,TexasInstrumentsIncorporated
Products conform m to o specifications per the terms s of f the e Texas
Instruments standard d warranty. . Production processing g does s not
necessarilyincludetestingofallparameters.
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LM12L458
SNAS085B– JULY1999– REVISEDMARCH2013
www.ti.com
ConnectionDiagram
*Pinnamesin()applytotheobsoleteLM12L454,shownforreferenceonly.
Figure1. ConnectionDiagram
FunctionalDiagram
Figure2. LM12L458
Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam
duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates.
2
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Copyright©1999– 2013,TexasInstrumentsIncorporated
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LM12L458
www.ti.com
SNAS085B– JULY1999– REVISEDMARCH2013
AbsoluteMaximumRatings
(1)(2)
SupplyVoltage(V
A
+andV
D
+)
6.0V
VoltageatInputandOutputPins,exceptanaloginputs
0.3Vto(V
+
+0.3V)
VoltageatAnalogInputs
5Vto(V
+
+5V)
|(V
A
+)
(V
D
+)|
300mV
InputCurrentatAnyPin(3)
±5mA
PackageInputCurrent
(3)
±20mA
PowerConsumption(T
A
=25°C)
(4)
875mW
StorageTemperature
65°Cto+150°C
LeadTemperature,Infrared,15sec.
+300°C
ESDSusceptibility(5)
1.5kV
(1) AbsoluteMaximumRatingsindicatelimitsbeyondwhichdamagetothedevicemayoccur.OperatingRatingsindicateconditionsfor
whichthedeviceisfunctional,butdonotensurespecificperformancelimits.Forensuredspecificationsandtestconditions,seethe
ElectricalCharacteristics.Theensuredspecificationsapplyonlyforthetestconditionslisted.Someperformancecharacteristicsmay
degradewhenthedeviceisnotoperatedunderthelistedtestconditions.
(2) AllvoltagesaremeasuredwithrespecttoGND,unlessotherwisespecified.
(3) Whentheinputvoltage(V
IN
)atanypinexceedsthepowersupplyrails(V
IN
<GNDorV
IN
>(V
A
+orV
D
+)),thecurrentatthatpinshould
belimitedto5mA.The20mAmaximumpackageinputcurrentratingallowsthevoltageatanyfourpins,withaninputcurrentof5mA,
tosimultaneouslyexceedthepowersupplyvoltages.
(4) ThemaximumpowerdissipationmustbederatedatelevatedtemperaturesandisdictatedbyT
Jmax
(maximumjunctiontemperature),
?
JA
(packagejunctiontoambientthermalresistance),andT
A
(ambienttemperature).Themaximumallowablepowerdissipationatany
temperatureisPD
max
=(T
Jmax
-T
A
)/?
JA
orthenumbergivenintheAbsoluteMaximumRatings,whicheverislower.
(5) Humanbodymodel,100pFdischargedthrougha1.5kOresistor.
PackageThermalResistances
Package
θ
JA
44-LeadPLCC
50°C/W
OperatingRatings
(1)(2)
TemperatureRange
40°C
T
A
85°C
SupplyVoltage-V
A
+,V
D
+
+3.0Vto+5.5V
|V
A
+
V
D
+|
100mV
V
IN+
InputRange
GND
V
IN+
V
A
+
V
IN
InputRange
GND
V
IN
V
A
+
V
REF+
InputVoltage
1V
V
REF+
V
A
+
V
REF
InputVoltage
0V
V
REF
V
REF+
1V
V
REF+
V
REF
1V
V
REF
V
A
+
V
REF
CommonModeRange(3)
0.1V
A
+
V
REFCM
0.6V
A
+
T
J
(MAX)
150°C
(1) AllvoltagesaremeasuredwithrespecttoGND,unlessotherwisespecified.
(2) AbsoluteMaximumRatingsindicatelimitsbeyondwhichdamagetothedevicemayoccur.OperatingRatingsindicateconditionsfor
whichthedeviceisfunctional,butdonotensurespecificperformancelimits.Forensuredspecificationsandtestconditions,seethe
ElectricalCharacteristics.Theensuredspecificationsapplyonlyforthetestconditionslisted.Someperformancecharacteristicsmay
degradewhenthedeviceisnotoperatedunderthelistedtestconditions.
(3) V
REFCM
(ReferenceVoltageCommonModeRange)isdefinedas(V
REF+
+V
REF-
)/2.
Table1.ReliabilityInformation-TransistorCount
Device
Number
P-ChanMOSTransistor
12,232
N-ChanMOSTransistor
15,457
ParasiticVerticalBipolarJunctionTransistor
4
ParasiticLateralBipolarJunctionTransistor
2
TOTALTransistors
27,695
Copyright©1999– 2013,TexasInstrumentsIncorporated
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LM12L458
SNAS085B– JULY1999– REVISEDMARCH2013
www.ti.com
ConverterCharacteristics
ThefollowingspecificationsapplyforV
A
+=V
D
+=+3.3V,V
REF+
=+2.5V,V
REF
=0V,12-bit+signconversionmode,f
CLK
=
6.0MHz,R
S
=25
Ω
,sourceimpedanceforV
REF+
andV
REF
25
Ω
,fully-differentialinputwithfixed1.25Vcommon-mode
voltage,andminimumacquisitiontimeunlessotherwisespecified.BoldfacelimitsapplyforT
A
=T
J
=T
MIN
toT
MAX
;allother
limitsT
A
=T
J
=25°C
(1)(2)(3)(4)
Symbol
Parameter
Conditions
Typical(5)
Limits(6)
Units
ILE
IntegralLinearityError
AfterAuto-Cal
(7)(8)
±1/2
±1
LSB(max)
TUE
TotalUnadjustedError
AfterAuto-Cal
(7)
±1
LSB
ResolutionwithNoMissingCodes
AfterAuto-Cal(7)
13
Bits(max)
DNL
DifferentialNon-Linearity
AfterAuto-Cal
±1
LSB(max)
ZeroError
AfterAuto-Cal(9)(8)
±1/4
±1
LSB(max)
PositiveFull-ScaleError
AfterAuto-Cal
(7)(8)
±1/2
±3
LSB(max)
NegativeFull-ScaleError
AfterAuto-Cal
(7)(8)
±1/2
±3
LSB(max)
DCCommonModeError
See(10)
±2
±4
LSB(max)
8-Bit+Signand“Watchdog” ModeIntegral
ILE
See
(7)
±1/2
LSB(max)
LinearityError
8-Bit+Signand“Watchdog” ModeTotal
TUE
AfterAuto-Zero
±1/2
±3/4
LSB(max)
UnadjustedError
8-Bit+Signand“Watchdog” Mode
9
Bits(max)
ResolutionwithNoMissingCodes
8-Bit+Signand“Watchdog” Mode
DNL
±1
LSB(max)
DifferentialNon-Linearity
8-Bit+Signand“Watchdog” ModeZero
AfterAuto-Zero
±1/2
LSB(max)
Error
8-Bit+Signand“Watchdog” Full-Scale
±1/2
LSB(max)
Error
8-Bit+Signand“Watchdog” ModeDC
±1/8
LSB
CommonModeError
MultiplexerChannel-to-ChannelMatching
±0.05
LSB
GND
V(min)
V
IN+
Non-InvertingInputRange
V
A
+
V(max)
GND
V(min)
V
IN
InvertingInputRange
V
A
+
V(max)
V
A
+
V(min)
V
IN+
V
IN
DifferentialInputVoltageRange
V
A
+
V(max)
GND
V(min)
CommonModeInputVoltageRange
V
A
+
V(max)
(1) Twoon-chipdiodesaretiedtoeachanaloginputthroughaseriesresistor,asshownbelow.Inputvoltagemagnitudeupto5Vabove
V
A
+or5VbelowGNDwillnotdamagetheLM12L458.However,errorsintheA/Dconversioncanoccurifthesediodesareforward
biasedbymorethan100mV.Asanexample,ifV
A
+is3.0V
DC
,full-scaleinputvoltagemustbe=3.1V
DC
toensureaccurate
conversions.SeeFigure3
(2) V
A
+andV
D
+mustbeconnectedtogethertothesamepowersupplyvoltageandbypassedwithseparatecapacitorsateachV
+
pinto
assureconversion/comparisonaccuracy.
(3) Accuracyisensuredwhenoperatingatf
CLK
=6MHz.
(4) WiththetestconditionforV
REF
=V
REF+
-V
REF-
givenas+2.5V,the12-bitLSBis305µ Vandthe8-bit/“Watchdog” ” LSBis4.88mV.
(5) TypicalfiguresareatT
A
=25°Candrepresentmostlikelyparametricnorm.
(6) LimitsarespecifiedtoAOQL(AverageOutputQualityLevel).
(7) Positiveintegrallinearityerrorisdefinedasthedeviationoftheanalogvalue,expressedinLSBs,fromthestraightlinethatpasses
throughpositivefull-scaleandzero.Fornegativeintegrallinearityerrorthestraightlinepassesthroughnegativefull-scaleandzero.
(SeeFigure10andFigure11).
(8) TheLM12L458'sself-calibrationtechniqueensureslinearityandoffseterrorsasspecified,butnoiseinherentintheself-calibration
processwillresultinarepeatabilityuncertaintyof±0.10LSB.
(9) Zeroerrorisameasureofthedeviationfromthemid-scalevoltage(acodeofzero),expressedinLSB.Itistheworst-casevalueofthe
codetransitionsbetween-1to0and0to+1(seeFigure12).
(10) TheDCcommon-modeerrorismeasuredwithbothinputsshortedtogetheranddrivenfrom0Vto+2.5V.Themeasuredvalueis
referredtotheresultingoutputvaluewhentheinputsaredrivenwitha1.25Vsignal.
4
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LM12L458
www.ti.com
SNAS085B– JULY1999– REVISEDMARCH2013
ConverterCharacteristics(continued)
ThefollowingspecificationsapplyforV
A
+=V
D
+=+3.3V,V
REF+
=+2.5V,V
REF
=0V,12-bit+signconversionmode,f
CLK
=
6.0MHz,R
S
=25
Ω
,sourceimpedanceforV
REF+
andV
REF
25
Ω
,fully-differentialinputwithfixed1.25Vcommon-mode
voltage,andminimumacquisitiontimeunlessotherwisespecified.BoldfacelimitsapplyforT
A
=T
J
=T
MIN
toT
MAX
;allother
limitsT
A
=T
J
=25°C
(1)(2)(3)(4)
Symbol
Parameter
Conditions
Typical(5)
Limits(6)
Units
ZeroError
V
A
+=V
D
+=+3.3V±10%
±0.2
±1.75
LSB(max)
PowerSupply
PSS
Full-ScaleError
V
REF+
=2.5V,V
REF
=GND
±0.4
±2
LSB(max)
Sensitivity
(11)
LinearityError
±0.2
LSB
C
REF
V
REF+
/V
REF
InputCapacitance
85
pF
SelectedMultiplexerChannelInput
C
IN
75
pF
Capacitance
(11) PowerSupplySensitivityismeasuredafterAuto-Zeroand/orAuto-CalibrationcyclehasbeencompletedwithV
A
+andV
D
+atthe
specifiedextremes.
ConverterACCharacteristics
ThefollowingspecificationsapplyforV
A
+=V
D
+=+3.3V,V
REF+
=+2.5V,V
REF
=0V,12-bit+signconversionmode,f
CLK
=
6.0MHz,R
S
=25
Ω
,sourceimpedanceforV
REF+
andV
REF
25
Ω
,fully-differentialinputwithfixed+1.25Vcommon-mode
voltage,andminimumacquisitiontimeunlessotherwisespecified.BoldfacelimitsapplyforT
A
=T
J
=T
MIN
toT
MAX
;allother
limitsT
A
=T
J
=25°C.
(1)(2)(3) (4)
Symbol
Parameter
Conditions
Typical(5)
Limits(6)
Units
40
%(min)
ClockDutyCycle
50
60
%(max)
13-BitResolution,SequencerState
44(t
CLK
)
44(t
CLK
)+50ns
(max)
S5(Figure31)
t
C
ConversionTime
9-BitResolution,SequencerState
21(t
CLK
)
21(t
CLK
)+50ns
(max)
S5(Figure31)
SequencerStateS7(Figure31)
9(t
CLK
)
9(t
CLK
)+50ns
(max)
Built-inminimumfor13-Bits
t
A
AcquisitionTime
Built-inminimumfor9-Bitsand
2(t
CLK
)
2(t
CLK
)+50ns
(max)
“Watchdog” mode
t
Z
Auto-ZeroTime
SequencerStateS2(Figure31)
76(t
CLK
)
76(t
CLK
)+50ns
(max)
t
CAL
FullCalibrationTime
SequencerStateS2(Figure31)
4944(t
CLK
)
4944(t
CLK
)+50ns
(max)
ThroughputRate
(7)
107
106
kHz(min)
t
WD
SequencerStatesS6,S4,andS5
“Watchdog” ModeComparisonTime
11(t
CLK
)
11(t
CLK
)+50ns
(max)
(Figure31)
t
PU
Power-UpTime
10
ms
t
WU
Wake-UpTime
10
ms
(1) Twoon-chipdiodesaretiedtoeachanaloginputthroughaseriesresistor,asshownbelow.Inputvoltagemagnitudeupto5Vabove
V
A
+or5VbelowGNDwillnotdamagetheLM12L458.However,errorsintheA/Dconversioncanoccurifthesediodesareforward
biasedbymorethan100mV.Asanexample,ifV
A
+is3.0V
DC
,full-scaleinputvoltagemustbe=3.1V
DC
toensureaccurate
conversions.SeeFigure3
(2) V
A
+andV
D
+mustbeconnectedtogethertothesamepowersupplyvoltageandbypassedwithseparatecapacitorsateachV
+
pinto
assureconversion/comparisonaccuracy.
(3) Accuracyisensuredwhenoperatingatf
CLK
=6MHz.
(4) WiththetestconditionforV
REF
=V
REF+
-V
REF-
givenas+2.5V,the12-bitLSBis305µ Vandthe8-bit/“Watchdog” ” LSBis4.88mV.
(5) TypicalfiguresareatT
A
=25°Candrepresentmostlikelyparametricnorm.
(6) LimitsarespecifiedtoAOQL(AverageOutputQualityLevel).
(7) TheThroughputRateisforasingleinstructionrepeatedcontinuously.Sequencerstates0(1clockcycle),1(1clockcycle),7(9clock
cycles)and5(44clockcycles)areused(seeFigure31).Oneadditionalclockcycleisusedtoreadtheconversionresultstoredinthe
FIFO,foratotalof56clockcyclesperconversion.TheThroughputRateisf
CLK
(MHz)/N,whereNisthenumberofclock
cycles/conversion.
Copyright©1999– 2013,TexasInstrumentsIncorporated
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LM12L458
SNAS085B– JULY1999– REVISEDMARCH2013
www.ti.com
DCCharacteristics
ThefollowingspecificationsapplyforV
A
+=V
D
+=+3.3V,V
REF+
=+2.5V,V
REF
=0V,f
CLK
=6.0MHzandminimumacquisition
timeunlessotherwisespecified.BoldfacelimitsapplyforT
A
=T
J
=T
MIN
toT
MAX
;allotherlimitsT
A
=T
J
=25°C.
(1) (2) (3)
Symbol
Parameter
Conditions
Typical
(4)
Limits
(5)
Units
I
D
+
V
D
+SupplyCurrent
CS=“1”
0.4
1.0
mA(max)
I
A
+
V
A
+SupplyCurrent
CS=“1”
2.25
3.5
mA(max)
Stand-BySupplyCurrent
ClockStopped
1.5
4.5
μ
A(max)
Power-Down
I
ST
(I
D
++I
A
+)
ModeSelected
6MHzClock
30
μ
A(max)
ON-Channel=3.6V
0.1
0.3
μ
A(max)
OFF-Channel=0V
MultiplexerON-ChannelLeakage
V
A
+=+3.6V
Current
ON-Channel=0V
0.1
0.3
μ
A(max)
OFF-Channel=3.6V
ON-Channel=3.6V
0.1
0.3
μ
A(max)
OFF-Channel=0V
MultiplexerOFF-Channel
V
A
+=+3.6V
LeakageCurrent
ON-Channel=0V
0.1
0.3
μ
A(max)
OFF-Channel=3.6V
V
IN
=+3.3V
850
1500
Ω
R
ON
MultiplexerON-Resistance
V
IN
=+1.65V
1300
2000
Ω
V
IN
=0V
830
1500
Ω
V
IN
=+3.3V
±1.0%
±3.0%
Ω
Multiplexer
Channel-to-Channel
V
IN
=+1.65V
±1.0%
±3.0%
Ω
R
ON
matching
V
IN
=0V
±1.0%
±3.0%
Ω
(1) Twoon-chipdiodesaretiedtoeachanaloginputthroughaseriesresistor,asshownbelow.Inputvoltagemagnitudeupto5Vabove
V
A
+or5VbelowGNDwillnotdamagetheLM12L458.However,errorsintheA/Dconversioncanoccurifthesediodesareforward
biasedbymorethan100mV.Asanexample,ifV
A
+is3.0V
DC
,full-scaleinputvoltagemustbe=3.1V
DC
toensureaccurate
conversions.SeeFigure3
(2) V
A
+andV
D
+mustbeconnectedtogethertothesamepowersupplyvoltageandbypassedwithseparatecapacitorsateachV
+
pinto
assureconversion/comparisonaccuracy.
(3) Accuracyisensuredwhenoperatingatf
CLK
=6MHz.
(4) TypicalfiguresareatT
A
=25°Candrepresentmostlikelyparametricnorm.
(5) LimitsarespecifiedtoAOQL(AverageOutputQualityLevel).
6
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ProductFolderLinks:LM12L458
LM12L458
www.ti.com
SNAS085B– JULY1999– REVISEDMARCH2013
DigitalCharacteristics
ThefollowingspecificationsapplyforV
A
+=V
D
+=+3.3V,unlessotherwisespecified.BoldfacelimitsapplyforT
A
=T
J
=
T
MIN
toT
MAX
;allotherlimitsT
A
=T
J
=25°C.
(1)(2)(3)
Symbol
Parameter
Conditions
Typical
(4)
Limits
(5)
Units
V
IN(1)
Logical“1” InputVoltage
V
A
+=V
D
+=+3.6V
2.0
V(min)
V
A
+=V
D
+=+3.0VALE,
0.7
V
IN(0)
Logical“0” InputVoltage
V(max)
Pin22
0.6
1.0
μ
A(max)
I
IN(1)
Logical“1” InputCurrent
V
IN
=+3.3V
0.005
2.0
μ
A(max)
1.0
I
IN(0)
Logical“0” InputCurrent
V
IN
=0V
0.005
μ
A(max)
2.0
C
IN
D0– D15InputCapacitance
6
pF
V
A
+=V
D
+=3.0V
V
OUT(1)
Logical“1” OutputVoltage
I
OUT
=
360
μ
A
2.4
V(min)
I
OUT
=
10
μ
A
2.85
V(min)
V
A
+=V
D
+=+3.0V
V
OUT(0)
Logical“0” OutputVoltage
I
OUT
=1.6mA
0.4
V(max)
I
OUT
=10
μ
A
0.1
V(max)
V
OUT
=0V
0.01
3.0
μ
A(max)
I
OUT
TRI-STATEOutputLeakageCurrent
V
OUT
=+3.3V
0.01
3.0
μ
A(max)
(1) Twoon-chipdiodesaretiedtoeachanaloginputthroughaseriesresistor,asshownbelow.Inputvoltagemagnitudeupto5Vabove
V
A
+or5VbelowGNDwillnotdamagetheLM12L458.However,errorsintheA/Dconversioncanoccurifthesediodesareforward
biasedbymorethan100mV.Asanexample,ifV
A
+is3.0V
DC
,full-scaleinputvoltagemustbe=3.1V
DC
toensureaccurate
conversions.SeeFigure3
(2) V
A
+andV
D
+mustbeconnectedtogethertothesamepowersupplyvoltageandbypassedwithseparatecapacitorsateachV
+
pinto
assureconversion/comparisonaccuracy.
(3) Accuracyisensuredwhenoperatingatf
CLK
=6MHz.
(4) TypicalfiguresareatT
A
=25°Candrepresentmostlikelyparametricnorm.
(5) LimitsarespecifiedtoAOQL(AverageOutputQualityLevel).
DigitalTimingCharacteristics
ThefollowingspecificationsapplyforV
A
+=V
D
+=+3.3V,t
r
=t
f
=3ns,andC
L
=100pFondataI/O,INTandDMARQlines
unlessotherwisespecified.BoldfacelimitsapplyforT
A
=T
J
=T
MIN
toT
MAX
;allotherlimitsT
A
=T
J
=25°C.
(1)(2)(3)
Symbol(See
Figure28Figure29
Parameter
Conditions
Typical(4)
Limits(5)
Units
Figure30)
1,3
CSorAddressValidtoALELowSet-UpTime
40
ns(min)
2,4
CSorAddressValidtoALELowHoldTime
20
ns(min)
5
ALEPulseWidth
45
ns(min)
6
RDHightoNextALEHigh
35
ns(min)
7
ALELowtoRDLow
20
ns(min)
8
RDPulseWidth
100
ns(min)
9
RDHightoNextRDorWRLow
100
ns(min)
10
ALELowtoWRLow
20
ns(min)
11
WRPulseWidth
60
ns(min)
12
WRHightoNextALEHigh
75
ns(min)
13
WRHightoNextRDorWRLow
140
ns(min)
(1) Twoon-chipdiodesaretiedtoeachanaloginputthroughaseriesresistor,asshownbelow.Inputvoltagemagnitudeupto5Vabove
V
A
+or5VbelowGNDwillnotdamagetheLM12L458.However,errorsintheA/Dconversioncanoccurifthesediodesareforward
biasedbymorethan100mV.Asanexample,ifV
A
+is3.0V
DC
,full-scaleinputvoltagemustbe=3.1V
DC
toensureaccurate
conversions.SeeFigure3
(2) V
A
+andV
D
+mustbeconnectedtogethertothesamepowersupplyvoltageandbypassedwithseparatecapacitorsateachV
+
pinto
assureconversion/comparisonaccuracy.
(3) Accuracyisensuredwhenoperatingatf
CLK
=6MHz.
(4) TypicalfiguresareatT
A
=25°Candrepresentmostlikelyparametricnorm.
(5) LimitsarespecifiedtoAOQL(AverageOutputQualityLevel).
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DigitalTimingCharacteristics(continued)
ThefollowingspecificationsapplyforV
A
+=V
D
+=+3.3V,t
r
=t
f
=3ns,andC
L
=100pFondataI/O,INTandDMARQlines
unlessotherwisespecified.BoldfacelimitsapplyforT
A
=T
J
=T
MIN
toT
MAX
;allotherlimitsT
A
=T
J
=25°C.
(1)(2)(3)
Symbol(See
Figure28Figure29
Parameter
Conditions
Typical
(4)
Limits
(5)
Units
Figure30)
14
DataValidtoWRHighSet-UpTime
40
ns(min)
15
DataValidtoWRHighHoldTime
30
ns(min)
ns(min)
10
16
RDLowtoDataBusOutofTRI-STATE
30
70
ns(max)
ns(min)
10
17
RDHightoTRI-STATE
R
L
=1k
Ω
30
110
ns(max)
ns(min)
10
18
RDLowtoDataValid(AccessTime)
30
95
ns(max)
20
AddressValidorCSLowtoRDLow
20
ns(min)
21
AddressValidorCSLowtoWRLow
20
ns(min)
19
AddressInvalidfromRDorWRHigh
10
ns(min)
ns(min)
10
22
INTHighfromRDLow
30
60
ns(max)
ns(min)
10
23
DMARQLowfromRDLow
30
60
ns(max)
Figure3.
TestCircuitsandWaveforms
Figure4. TRI-STATETestCircuitsandWaveforms
8
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LM12L458
www.ti.com
SNAS085B– JULY1999– REVISEDMARCH2013
InputandReferenceRange
V
REF
=V
REF+
V
REF
V
IN
=V
IN+
V
IN
GND
V
IN+
V
A
+
GND
V
IN
V
A
+
Figure5. TheGeneralCaseofOutputDigitalCodevs.theOperatingInputVoltageRange
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SNAS085B– JULY1999– REVISEDMARCH2013
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V
REF+
V
REF
=2.5V
V
IN
=V
IN+
V
IN
GND
V
IN+
V
A
+
GND
V
IN
V
A
+
Figure6. SpecificCaseofOutputDigitalCodevs.theOperatingInputVoltageRangeforV
REF
=2.5V
Figure7. TheGeneralCaseoftheV
REF
OperatingRange
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