1. ACTIVE POWER FACTOR CORRECTION
1.13.3 Setting Up the PWM Component Values
The control components external to the IC are shown in Fig. 4.1.23, and the control IC
is shown in Fig. 4.1.24. Unlike the case with the PFC section, very little calculation is
required to establish the optimum values of the pulse-width modulator components.
1. Soft start. A capacitor (C11) on pin 5 sets the soft-start delay and ramp-up period of
thePWM buck drive stage. The capacitor on this pin is charged from the IC at a constant
current of 50 MA, and will provide a delay and then a progressively increasing pulse
width as the capacitor charges above 2.7 V.
The start of charge is delayed by Q1 and Q2 within the IC until both the supply
voltage to the IC and the output voltage of the PFC boost stage have been correctly
established. Full output is obtained when the voltage on pin 5 ramps up to near the
peak value of the ramp on pin 9, plus a 1.5-V offset. The typical peak ramp voltage will
be 5 V. Hence, C11 is selected to reach 6.5 V within the required soft-start time, when
charged at a constant current of 50 MA.
2. Current limit. A fast-acting, pulse-by-pulse peak-current limit is provided by com-
parator A2 within the IC. The limiting voltage on pin 10 is 1 V, and the external shunt
is chosen to give this voltage at the required peak current in Q2.
In this topology, the peak current in Q2 is also the peak output current, which is to
be 8 A. Hence R
is set to 0.13 7. (A 10-W resistor is required.) Some noise rejection is
provided by R12 and C12, and fine current adjustment is provided by R11.
3. Ramp 2. ThePWM modulator ramp is defined by R10 and C10. These values are devel-
oped as shown in the Micro Linear data sheet and application notes 16, 33, and 34.
1.14 POWER COMPONENTS
Figure 4.1.22 shows the major power components external to the control circuits. Of par-
ticular interest are the inductors L1 and L2 and the larger capacitors C1 and C4. Since
there are no absolute equations for the selection of these components, it can be difficult to
decide on the optimum values.
In practice, the choice depends on several factors related to required performance,
application, stress, temperature, cooling, weight, size, and cost, and so the selection is
often a compromise. In general, as regards best performance, the larger these components
are, the better. The following are some guidelines that should help the designer in this
1.14.1 L1 Inductor (Choke) Size
In this example, L1 is the power factor inductor, or more correctly choke, since it has a DC
component. The main function of L1 is to limit the current flow from the low-impedance
supply into Q1 when Q1 is turned “on,” connecting L1 to the common line. Since the mode
is to be continuous by design, the choke is also required to maintain the input current flow
nearly constant during a switching cycle; hence it will maintain a current flow into C1 via
D1 when Q1 is “off.”
Maximum Choke Size. Clearly a very large inductance will meet the above requirements
much better than a small inductance, so is there a maximum limit? Again, clearly there is,
as the choke should not be so large as to impede the flow of the 120-Hz haversine current.
We can get an approximate limiting value for the inductance by calculating the value
required to limit the input current at 120 Hz to the required full load current at the nominal
input voltage without any other components, as follows:
Input voltage nominal 277 V rms
Input power at 90% efficiency 2.4 kW
Input current P/V 8.8 A rms
Maximum reactance of L1 at 120 Hz V
Hence, the maximum inductance would be of the order of 40 mH. This would be a very
large choke at 8.8 A, and it is clear that it is very unlikely that the maximum inductance
would become a limiting factor in any real design.
Minimum Choke Size. We now consider the factors limiting the minimum inductance.
Reducing the inductance will increase the switching frequency ripple current. Large ripple
currents directly stress the switching components Q1 and D1 and the output capacitor C1.
Less directly, they put additional demands on the line input RFI filter, since the ripple cur-
rent flows via the input bridge rectifier BR1 to the filter. Hence, if L1 is small, a larger RFI
filter would be required in order to give acceptable noise current at the line input. Any one
or more of these may become the limiting factor on the minimum size of L1.
In particular, some conducted-mode RFI specifications apply strict limits on the low-
frequency line noise down as far as 10 kHz. Since a small L1 will increase the require-
ments of the line filter, it is often more cost-effective to increase the inductance of L1,
rather than use a larger line filter.
An arbitrary factor often used to define the inductance of L1 is to choose to limit the
peak ripple current to some reasonable percentage of the peak loading current; typically
ripple currents in the range of 5 to 20% are used.
1.14.2 L1 Choke Design Parameters
For this design, we will work on the basis of a maximum of 15% ripple current so that we
can calculate a median arbitrary value for L1.
Since the haversine input voltage to L1 changes throughout the cycle, the duty cycle
also changes and the switching frequency ripple current will change throughout the
haversine cycle. Maximum ripple current will occur when the haversine voltage is half
the output voltage, at which point the duty cycle is 50%. L1 can then be calculated as
The maximum input current occurs at full load and minimum input voltage.
) 220 V rms
Maximum input power (P
) at 90% efficiency 2400 W
RMS input current P
10.9 A rms
Peak choke current at 120 Hz
1.414 r 10.9 15.4 A
Peak-to-peak ripple current 15% I
The output voltage on C1 is 450 V. Maximum ripple current will occur when V
, or 225 V. At this point the duty ratio will be 50%, and at 50 kHz, Q1 will be “on”
1. ACTIVE POWER FACTOR CORRECTION
for 10 Ms. There will be a near linear rate of change of current in L1 when Q1 is “on,” as
Since L di/dt e (the applied voltage of 225 V),
Hence, the value of L1 for 15% ripple current (2.3 A p-p) would be 1 mH. The value is
arbitrary, and larger or smaller values may be chosen, depending on the tradeoff required
between ripple current performance and the size, weight, and cost of the choke.
It should be noticed that L1 has a unidirectional 120-Hz haversine applied to it. The
peak current in L1 is 15.4 A [Eq. (4.1.8)]. The change in the 120-Hz current at the peak
of the haversine is relatively slow (compared with the switching frequency); hence, for
the choke design, the peak 15.4 A can be considered a DC current. Therefore, the choke
must not saturate at 15.4 A DC plus half the high-frequency ripple current component of
2.3 A [Eq. (4.1.9)], and a maximum current of 16.6 A DC would be used for the choke
The relatively small high-frequency ripple current leads to low switching losses in the
choke core and favors the use of low-cost, low-permeability, iron powder cores for this
application. If ferrite cores are preferred, then a suitable air gap must be used to prevent
saturation of the core by the DC component.
1.14.3 Choke L1, Applied Design
In general, suitable design methods for L1 will be found in Part 3, Chaps. 1, 2, and 3. An
example of one particular design for this application is also shown in Appendix 1.A.
L1 Design Parameters
Inductance: 1 mH [Eq.(4.1.10)]
Peak current: 16.6 A
Maximum mean current: 10.9 A rms
Ripple current: 2.3 A p-p (0.663 A rms) [Eq. (4.1.9)]
Frequency: 50 kHz
Output voltage maximum: 450 V DC
Input voltage for maximum ripple current: 225 V
Duty ratio at 225 V: 50% 10 Ms
Copper Loss. The winding copper loss (I2
R loss) in this type of choke should be given
special consideration. It is common practice to neglect the loss caused by the relatively
small ripple current, because the DC current component is typically much larger (in this
example, 10.9 A rms compared to 0.663 A rms).
Since, in simple terms, the loss is proportional to I
, where R
is the winding resis-
tance, it would appear that the contribution from the 120-Hz component would be 126 R
and the contribution from the 50-kHz component would be only 0.44 R
, where F
ratio of ac to DC resistance at 50 kHz, and thus it would appear reasonable to neglect the
loss due to high-frequency ripple.
Further, it would also appear that the skin effect (which is much more applicable to the
high-frequency ripple) could also be neglected. Hence, it is common practice to use a single
solid wire for the choke winding.
However, calculations in Appendix 1.A show that this simplistic approach is not valid,
because with a single solid wire, the ac/DC resistance ratio F
can be very large, and so
stranded wire should be used for best results in this example.
1.14.4 L2 Choke Size
L2 is the output buck regulator choke. Once again, the choice of inductance for L2 is
arbitrary. Large values of inductance give low ripple currents, but are large and expensive
and may limit the output current slew rate (load transient response).
Small values of inductance will give large ripple currents and will result in a change
from continuous conduction to discontinuous conduction at a higher minimum current.
Large ripple currents will stress Q2, D2, and C4 and result in larger output ripple volt-
As with L1, L2 is often designed for a ripple current in the range of 5 to 20% of the
peak-to-peak value. The maximum ripple current will occur when the output voltage is
half the supply voltage, at which point the duty cycle is 50%.
In this example, the input voltage is 450 V. The maximum output current is to be 8 A.
The frequency is the same (50 kHz). Hence, L2 may be calculated in a way similar to that
shown in Sec. 1.14.1.
The buck stage input voltage (from C1) is 450 V constant. With V
set at 225 V, Q2 will
be “on” or 50% duty, or 10 Ms in this example, and the voltage across L2 is 225 V for 10 Ms.
There will be a linear increase in current in L2 when Q2 is “on”; hence
Maximum output current
Once again, an iron powder core may be used for this choke. The design is covered more
fully in Part 3, Chaps. 1, 2, and 3. The choke must support a DC current of 8.8 A maxi-
mum. The particular design approach shown in Appendix 1.A may be used, with the DC
current reduced to 8.8 A and the inductance increased to 2.8 mH.
1.14.5 Capacitor Selection
C4. The output capacitor C4 is not very highly stressed, as the ripple current from L2 into
C4 is a continuous triangular waveform at a maximum of 0.8 A p-p. However, the load
may have large ripple currents, and if so, this must be considered in the selection of C4.
Otherwise, a simple low-ESR electrolytic capacitor of a size that will give an acccptable
output ripple voltage would be selected. The voltage rating should be at least as high as the
supply voltage (in this case, 450 V).
1. ACTIVE POWER FACTOR CORRECTION
C1. C1 is a quite different proposition. This capacitor must carry the 120-Hz haversine
current and the switching frequency current. It should be noticed that the current from D1
into C1 is discontinuous at the switching frequency (when Q1 is “on,” the current in D1
The use of leading-edge modulation on Q1 and trailing-edge modulation on Q2 will reduce
the ripple current in C1, because as Q1 turns “off” and D1 conducts current into C1, Q2 will
turn “on” and divert current away from C1. The overall effect has been shown89 to reduce
the effective ripple current in C1 by up to 30%.
The current applied to C1 is a near-rectangular waveform at the switching frequency,
which changes in amplitude throughout the applied haversine. Hence C1 must have a low
impedance at the switching frequency and must be large enough to give an acceptably
low ripple voltage at the 120-Hz haversine frequency (that is, it must have a low ESR and
a high capacitance). At high power it is difficult to satisfy both requirements in a single
Figure 4.1.29 shows a method that can be used in high-power applications to reduce
the stress on C1. C1 is split into one or more electrolytic capacitors C1a and C1b and one
or more film capacitors C2a and C2b. The film capacitors are intended to take most of the
high-frequency current and the electrolytic capacitors the low-frequency current.
FIG. 4.1.29 Boost input stage with inrush limiting current bypass diode D3, and ripple
current steering arrangements.
The electrolytic capacitors will have large capacitance values (typically 470 MF or
more in this application), and the film capacitors will be quite small. (A typical 3.3-MF
450-V metalized polyester film capacitor may have a ripple current rating of 15 A or so
at 50 kHz.)
To encourage the high-frequency current to flow in the film capacitors, a resistance is
placed in series with each electrolytic capacitor. In this example, an NTC (negative tem-
perature coefficient thermistor) is used. This also provides inrush protection, as explained
in Sec. 1.14.6. High-frequency ripple currents are best minimized in the electrolytic capac-
itors, as they tend to flow in a small section of the foil near the terminals, causing local
heating in the capacitor.
We can establish a suitable resistance value for the NTC by calculating the impedance
of the film capacitors at the switching frequency. Assume two 3.3-MF film capacitors are
used in parallel.
for each capacitor, to give
atotal of 0 .5 7
If 2 7 is chosen as the working resistance of each NTC, then two-thirds of the high-
frequency ripple current will flow in the film capacitors.
However, the NTCs will increase the low-frequency ripple voltage at the output of C1
Each 470-MF capacitor will have an impedance at 120 Hz of 2.8 7, and the NTC will
approximately double the ripple voltage. Since half the ripple current flows in each elec-
trolytic capacitor, at the maximum input current of 15 A the peak-to-peak ripple voltage
will be approximately 28 V (in a DC of 450 V), or about 6%. This is quite satisfactory
for the intended application.
1.14.6 Inrush Current Limiting
Refer to the basic PFC stage, shown in Fig. 4.1.22. When first turned “on,” the capacitor
C1 is discharged, and current will flow via L1 and D1 into C1 to charge the capacitor. If
the unit is turned “on” at the peak of the applied line voltage (430 V), the rate of change
of current in L1 would be 287 A/ms, and clearly a very large current would flow before
the half cycle is finished.
Since L1 will have been designed to saturate at some current above 15 A, it is likely
that L1 will be saturated. If Q1 turns “on” when L1 is near saturation, the current will not
be limited, and Q1 will fail.
Figure 4.1.29 shows a better arrangement, in which L1 is shunted by diode D3. Also,
the large electrolytic capacitors have NTCs in series with them. Although the NTC is
chosen to have a hot resistance of 2 7 or less, when cold the resistance will be typically
50 7, and the inrush current will be limited to <20 A. With D3 shunting the inductor L1,
the inrush current is diverted away from the inductor, preventing saturation. When C1 is
fully charged and the boost circuit is active, D3 is reverse-biased and is out of the circuit.
In normal operation, the ripple current in the electrolytic capacitors will maintain heat-
ing of the NTCs and hence maintain their low resistance.
1.14.7 Low-Loss Snubber Circuit
Figure 4.1.30 shows a low-loss snubber circuit. The high voltage and fast switching of Q1
and Q2 tend to result in voltage spikes on these components during the high-current turn-
“off” edge. These effects should be minimized by good layout, and can be further reduced
by snubber circuits.
Simple snubber circuits are lossy and will dissipate transient energy in a snubber resis-
tor. In high-power applications this energy may be quite large. Figure 4.1.30 shows a low-
loss snubber circuit in which the recovered energy is used to drive a 24-V cooling fan and
useful work is done.
The snubber works as follows: Consider Q1 during the turn-“off” edge. As the voltage
on the Q1 drain rises, the previous drain current is diverted via C5 and D3 into the large
storage capacitor C7. This reduces the rate of change of voltage on the Q1 drain and much
reduces any tendency for voltage overshoot.
1. ACTIVE POWER FACTOR CORRECTION
At the end of turn-“off,” the voltage across C5 will be the voltage on C1 (450 V) minus
the 24 V on C7. When Q1 turns “on,” the left side of C5 goes to zero and the right side
of C5 goes negative by 426 V, reverse-biasing D3 and bringing D5 into conduction. The
negative voltage applied to L3 will cause current to flow in L3 in the direction shown.
With Q1 now fully “on,” this current will charge the right side of C5 positive until D3
conducts at 24 V, at which time the current will continue to charge C7. The time con-
stants of L3 and C5 and the 24 V are chosen to ensure that the current in L3 has dropped
to a low level before Q1 turns “on” again. This returns C5 and L3 to their original state
for the next turn-“off of Q1. The same action applies for Q2, with C6, D4, and D6. Z1
clamps C7 at 24 V, but the main loading is the 24-V fan. C5 and C6 are selected to just
provide the required fan current.
Note:At the time of going to press with this third edition (the 2008-1010 depression years),
the semiconductor industry was going through a rapid restructuring. Micro Linear was
taken over by Unitrode and then Unitrode was taken over by Texas Instruments. As a result
the Micro Linear ML4826 went out of manufacture at that time. (We can only hope that this
excellent IC will be made again.) However, the principles described above apply to many
similar ICs and for that reason it is still included here.
FIG. 4.1.30 Low-loss voltage snubber circuit with 24-V fan drive.
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