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11
Processor-in-the-Loop
Asaseparatelylicensedfeature,PLECSofferssupportforProcessor-in-the-
Loop(PIL)simulations,allowingtheexecutionofcontrolcodeonexternal
hardwaretiedintothevirtualworldofaPLECSmodel.
AtthePLECSlevel,thePILfunctionalityconsistsofaspecializedPILblock
thatcanbefoundintheProcessor-in-the-looplibrary,aswellastheTarget
Manager,accessiblefromtheWindowmenu.AlsoincludedwiththePIL
libraryarehigh-fidelityperipheralmodelsofMCUsusedforthecontrolof
powerconversionsystems.
Ontheembeddedside,aPILFrameworklibraryisprovidedtofacilitatethe
integrationofPILfunctionalityintoyourproject.
Motivation
Whendevelopingembeddedcontrolalgorithms,itisquitecommontobetest-
ingsuchcode,orportionsthereof,byexecutingitinsideacircuitsimulator.
UsingPLECS,thiscanbeeasilyachievedbymeansofaC-ScriptorDLL
block.ThisapproachisreferredtoasSoftware-in-the-loop(SIL).ASILsim-
ulationcompilestheembeddedsourcecodeforthenativeenvironmentofthe
simulationtool(e.g.Win64)andexecutesthealgorithmswithinthesimulation
environment.
ThePILapproach,ontheotherhand,executesthecontrolalgorithmsonthe
realembeddedhardware.Insteadofreadingtheactualsensorsofthepower
converter,valuescalculatedbythesimulationtoolareusedasinputstothe
embeddedalgorithm.Similarly,outputsofthecontrolalgorithmsexecuting
ontheprocessorarefedbackintothesimulationtodrivethevirtualenviron-
ment.NotethatSILandPILtestingarealsorelevantwhentheembedded
codeisautomaticallygeneratedfromthesimulationmodel.
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11
Processor-in-the-Loop
OneofthemajoradvantagesofPILoverSIListhatduringPILtesting,ac-
tualcompiledcodeisexecutedontherealMCU.Thisallowsthedetectionof
platform-specificsoftwaredefectssuchasoverflowconditionsandcastinger-
rors.Furthermore,whilePILtestingdoesnotexecutethecontrolalgorithms
intruereal-time,thecontroltasksdoexecuteatthenormalratebetweentwo
simulationsteps.Therefore,PILsimulationcanbeusedtodetectandana-
lyzepotentialproblemsrelatedtothemulti-threadedexecutionofcontrolalgo-
rithms,includingjitterandresourcecorruption.PILtestingcanalsoprovide
usefulmetricsaboutprocessorutilization.
HowPILWorks
Atthemostbasiclevel,aPILsimulationcanbesummarizedasfollows:
PrincipleofaPILsimulation
• Inputvariablesonthetarget,suchascurrentandvoltagemeasurements,
areoverriddenwithvaluesprovidedbythePLECSsimulation.
• Thecontrolalgorithmsareexecutedforonecontrolperiod.
• Outputvariablesonthetarget,suchasPWMperipheralregistervalues,
arereadandfedbackintothesimulation.
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HowPILWorks
WerefertovariablesonthetargetwhichareoverriddenbyPLECSasOver-
rideProbes.VariablesreadbyPLECSarecalledReadProbes.
WhileOverrideProbesaresetandReadProbesarereadthedispatchingof
theembeddedcontrolalgorithmsmustbestopped.Thecontrolsmustremain
haltedwhilePLECSisupdatingthesimulatedmodel.Inotherwords,thecon-
trolalgorithmoperatesinasteppedmodeduringaPILsimulation.However,
asmentionedabove,whenthecontrolalgorithmsareexecuting,theirbehavior
isidenticaltoatruereal-timeoperation.Wethereforecallthismodeofopera-
tionpseudoreal-time.
Letusfurtherexaminethepseudoreal-timeoperationinthecontextofan
embeddedapplicationutilizingnestedcontrolloopswherefasthigh-priority
tasks(suchascurrentcontrol)interruptslowerlower-prioritytasks(suchas
voltagecontrol).Anexampleofsuchaconfigurationwithtwocontroltasksis
illustratedinthefigurebelow.Witheveryhardwareinterrupt(boldvertical
bar),thelowerprioritytaskisinterruptedandthemaininterruptservicerou-
tineisexecuted.Inaddition,thelowerprioritytaskisperiodicallytriggered
usingasoftwareinterrupt.Oncebothcontroltaskshavecompleted,thesys-
temcontinueswiththebackgroundtaskwherelowestpriorityoperationsare
processed.Thetiminginthisfigurecorrespondstotruereal-timeoperation.
Control Task 1
Control Task 2
Background Task
1
2
3
4
5
6
NestedControlTasks
ThenextfigureillustratesthetimingofthesamecontrollerduringaPILsim-
ulation,withthestopandgosymbolsindicatingwhenthedispatchingofthe
controltasksishaltedandresumed.
Afterthehardwareinterruptisreceived,thesystemstopsthecontroldis-
patchingandentersacommunicationloopwherethevaluesoftheOverride
ProbesandReadProbescanbeexchangedwiththePLECSmodel.Oncea
newsteprequestisreceivedfromthesimulation,thetaskdispatchingis
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11
Processor-in-the-Loop
Control Task 1
Control Task 2
Background Task
2
3
STOP
1
STOP
STOP
Pseudoreal-timeoperation
restartedandthecontroltasksexecutefreelyduringthedurationofonein-
terruptperiod.Thispseudoreal-timeoperationallowstheusertoanalyzethe
controlsysteminasimulationenvironmentinafashionthatisbehaviorally
identicaltoatruereal-timeoperation.Notethatonlythedispatchingofthe
controltasksisstopped.Thetargetitselfisneverhaltedascommunication
withPLECSmustbemaintained.
PILModes
TheconceptofusingOverrideProbesandReadProbesallowstyingactual
controlcodeexecutingonarealMCUintoaPLECSsimulationwithoutthe
needtospecificallyrecompileitforPIL.
YoucanthinkofOverrideProbesandReadProbesastheequivalentoftest
pointswhichcanbeleftintheembeddedsoftwareaslongasdesired.Soft-
waremoduleswithsuchtestpointscanbetiedintoaPILsimulationatany
time.
Often,OverrideProbesandReadProbesareconfiguredtoaccesstheregisters
ofMCUperipherals,suchasanalog-to-digitalconverters(ADCs)andpulse-
widthmodulation(PWM)modules.Additionally,specificsoftwaremodules,e.g.
afilterblock,canbeequippedwithOverrideProbesandReadProbes.This
allowsunit-testingthemoduleinaPILsimulationisolatedfromtherestof
theembeddedcode.
Topermitsafeandcontrolledtransitionsbetweenreal-timeexecutionofthe
controlcode,drivinganactualplant,andpseudoreal-timeexecution,incon-
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ConfiguringPLECSforPIL
junctionwithasimulatedplant,thefollowingtwoPILmodesaredistin-
guished:
• NormalOperation–RegulartargetoperationinwhichPILsimulations
areinhibited.
• ReadyforPIL–TargetisreadyforaPILsimulation,whichcorresponds
toasafestatewiththepower-stagedisabled.
Thetransitionbetweenthetwomodescaneitherbecontrolledbytheembed-
dedapplication,forexamplebasedonasetofdigitalinputs,orfromPLECS
usingtheTargetManager.
ConfiguringPLECSforPIL
OnceanembeddedapplicationisequippedwiththePILframework,andap-
propriateOverrideProbesandReadProbesaredefined,itisreadyforPIL
simulationswithPLECS.
PLECSusestheconceptofTargetConfigurationstodefineglobalhigh-level
settingsthatcanbeaccessedbyanyPLECSmodel.Atthecircuitlevel,the
PILblockisutilizedtodefinelowerlevelconfigurationssuchastheselection
ofOverrideProbesandReadProbesusedduringsimulation.
Thisisexplainedinfurtherdetailinthefollowingsections.
TargetManager
Thehigh-levelconfigurationsaremadeintheTargetManager,whichisac-
cessibleinPLECSbymeansofthecorrespondingitemintheWindowmenu.
ThetargetmanagerallowsdefiningandconfiguringtargetsforPILsimula-
tion,byassociatingthemwithasymbolfileandspecifyingthecommunication
parameters.TargetconfigurationsarestoredgloballyatthePLECSleveland
arenotsavedin
*.plecs
orSimulinkfiles.Anexampletargetconfigurationis
showninthefigurebelow.
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11
Processor-in-the-Loop
TargetManager
Thelefthandsideofthedialogwindowshowsalistoftargetsthatarecur-
rentlyconfigured.Toaddanewtargetconfiguration,clickthebuttonmarked
+belowthelist.Toremovethecurrentlyselectedtarget,clickthebutton
marked-.Youcanreorderthetargetsbyclickinganddragginganentryup
anddowninthelist.
Therighthandsideofthedialogwindowshowstheparametersettingsof
thecurrentlyselectedtarget.Eachtargetconfigurationmusthaveaunique
Name.
ThetargetconfigurationspecifiestheSymbolfileandthecommunication
linksettings.
Thesymbolfileisthebinaryfile(alsocalled“objectfile”)correspondingtothe
codeexecutingonthetarget.PLECSwillobtainmostsettingsforPILsimu-
lations,aswellasthelistofOverrideProbesandReadProbesandtheirat-
tributes,fromthesymbolfile.
CommunicationLinks
Anumberoflinksaresupportedforcommunicatingwiththetarget.Thede-
siredlinkcanbeselectedintheDevicetypecombobox.Forcommunication
linksthatallowdetectingconnecteddevices,pressingtheScanbuttonwill
populatetheDevicenamecomboboxwiththenamesofallavailabledevices.
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TargetManager
SerialDevice
TheSerialdeviceselectioncorrespondstoconventionalphysicalorvirtual
serialcommunicationports.OnaWindowsmachine,suchportsarelabeled
COMn
,where
n
isthenumberoftheport.
FTDIDevice
IftheserialadapterisbasedonanFTDIchip,thelow-levelFTDIdrivercan
beuseddirectlybyselectingtheFTD2XXoption.Thisdevicetypeoffersim-
provedcommunicationspeedoverthevirtualcommunicationport(VCP)asso-
ciatedwiththeFTDIadapter.
TCP/IPSocket
ThecommunicationcanalsoberoutedoveraTCP/IPsocketbyselectingthe
TCPSocketdevicetype.
TCP/IPCommunication
InthiscasetheDevicenamecorrespondstotheIPaddress(orURL)and
portnumber,separatedbyacolon(:).
235
11
Processor-in-the-Loop
TCP/IPBridge
TheTCPBridgedevicetypeprovidesagenericinterfaceforutilizingcustom
communicationlinks.Thisoptionpermitscommunicationoveranexternalap-
plicationwhichservesasa“bridge”betweenaserialTCP/IPsocketandacus-
tomlink/protocol.
TargetProperties
BypressingthePropertiesbutton,targetinformationcanbedisplayedas
showninthefigurebelow.
TargetProperties
Inadditiontoreadinganddisplayinginformationfromthesymbolfile,PLECS
willalsoquerythetargetforitsidentityandcheckthevalueagainsttheone
storedinthesymbolfile.Thisverifiesthedevicesettingsandensuresthatthe
correctbinaryfilehasbeenselected.Further,theusercanrequestforatarget
modechangetoconfiguretheembeddedcodetoruninNormalOperation
modeorinReadyforPILmode.
PILBlock
ThePILblocktiesaprocessorintoaPLECSsimulationbymakingOverride
ProbesandReadProbes,configuredonthetarget,availableasinputandout-
putports,respectively.
236
PILBlock
PILBlock
APILblockisassociatedwithatargetdefinedinthetargetmanager,which
isselectedfromtheTargetcombobox.TheConfigure... buttonprovidesa
convenientshortcuttothetargetmanagerforconfiguringexistingandnew
targets.
PILBlockGeneralTab
TheexecutionofthePILblockcanbetriggeredatafixedDiscrete-Periodic
ratebyconfiguringtheSampletimetoapositivevalue.Aswithother
PLECScomponents,anInheritedsampletimecanbeselectedbysettingthe
parameterto-1or[-10].
AtriggerportcanbeenabledusingtheExternaltriggercombobox.Thisis
usefulifthecontrolinterruptsourceispartofthePLECScircuit,suchasan
ADCorPWMperipheralmodel.
237
11
Processor-in-the-Loop
Typically,anInheritedsampletimeisusedincombinationwithatrigger
port.IfaDiscrete-Periodicrateisspecified,thetriggerportwillbesampled
atthespecifiedrate.
SimilartotheDLLblock,theOutputdelaysettingpermitsdelayingtheout-
putofeachsimulationsteptoapproximateprocessorcalculationtime.
Note MakesurethevaluefortheOutputdelaydoesnotexceedthesample
timeoftheblock,ortheoutputswillneverbeupdated.
Adelayof0isavalidsetting,butitwillcreatedirect-feedthroughbetween
inputsandoutputs.
PILBlockInputsTab
ThePILblockextractsthenamesofOverrideProbesandReadProbesfrom
thesymbolfileselectedinthetargetconfigurationandpresentslistsforselec-
tionasinputandoutputsignals,asshowninthefigureabove.
ThenumberofinputsandoutputsofaPILblockisconfigurablewiththe
NumberofinputsandNumberofoutputssettings.ToassociateOverride
238
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