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Chap
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Op
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<signal_name|vhdl_process_name/
process_variable_name> [element t reference,
element reference, , ...
]
<value>
<signalname>referstothenameofthesignalorbustowhich
youwanttoassignavalue.Thiscanalsobethenameofan
arrayofsignals/buses,anarrayofrecordscontainingsignals
andbuses,orarecordofarraysofbuses/signals.
<vhdl_process_name/process_variable_name>isthenameofthe
processandprocessvariabletoassignavalue. Toassigna
valuetoaprocessvariable,youmustalsosupplythename
oftheprocessthatcontainsthevariable. Theprocessname
andprocessvariablenamesmustbeseparatedby"/".
[elementreference]referstothedifferentwaysinwhichthe
sub-elementsofthesignalnamecanbereferencedwhen
usedwiththe
put
command.Thisprovidestheability
tofurtherrefinethesignalsbyreferencingtheindividual
sub-elementsofasignal.PleaseseeExamplesbelowfor
moreinformation.
Theacceptedvaluedependsonthesignaltypeasfollows.
Integertypecanbeapositiveornegativeinteger.
Abit_vectorcanbe0or1oraseriesof0sand1s.
ForVHDL,std_logicvaluescanbeU,X,0,1,etc.
ForVerilog,bit_valuescanbeU,X,0,1.
Strengthvaluesarenotsupported.
<object> <value> [
-
radix <radix_type> > ]
Takesavaluewiththespecifiedradix,convertsthevalueto
thedatatypeoftheobject,andwritesthevaluetotheobject.
<object>specifiesthesignals,busesorobjectstomodify.
<value>referstothevalueyouwishtoaddtotheobject.
Thesupportedradixtypesare
default
,
dec
,
bin
,
oct
,
hex
,
unsigned
and
ascii
. Whennoradixtypeis
specified,theglobalradixtypesetwiththe
isim set
radix
commandisused,orifnoneissetthere,
default
isusedasradix.
Examp
l
es
A
ss
i
gnaVa
l
ueToaBuso
r
S
i
gna
l
Toassignavaluetoasignalcalled
clk
:
put clk
1
or
put clk
1 -
radix bin
or
put clk
"1" -
radix bin
Toassignavaluetoa4-bitbuscalled
busx
:
put busx
0101
ToassignavalueFFtosignalA:
put
A FF -
radix hex
Toassignabitvalueof"1"toasignalcalledcount(6)inthemoduleu1thatisinstantiatedunderyourcurrent
scope:
put u
1/
count
(6) 1
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Chap
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Us
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ommands
A
ss
i
gnaVa
l
ueToaS
t
andar
dLog
i
cVec
t
o
r
Forastandardlogicvectorcalled
sigx
thatisdeclaredasfollows:
signal sigx
:
std_logic_vector
(0
to
5);
Tosetbit0of
sigx
to"1":
put sigx
(0) 1
Tosetslice1to2of
sigx
to"11":
put sigx
(1:2) 11
Tosetallof
sigx
to"101010":
put sigx
101010
A
ss
i
gnaVa
l
ueToan
A
rrayo
f
Ob
j
ec
t
s
Foranarrayofstandardlogicvectorsthatisdeclaredasfollows:
signal sigarray
:
(0
to
3)
vectorarray
(0
to
5, 1
to
4, 2
to
6);
Toseteverybitofthearrayelementof
sigarray
to"1":
put sigarray
(0,1,2)1111
Tosetthefirsttwobitsofthearrayelementof
sigarray
to"10":
put sigarray
(0,1,2)(1:2)10
Tosetbitsthreeofthearrayelementof
sigarray
to"1":
put sigarray
(0,1,2)(3)1
Foranarrayofrecordswhichinturncontainanarrayofstandardlogicvectorsthatisdeclaredasfollows:
type ram_
3
d_vector is array
(0
to
10, 7
downto
0, 0
to
2)
of std_logic_vector
(1
to
4);
type rectype is record
a
:
integer
;
b
:
string
(1
to
7);
c
:
std_logic_vector
(0
to
3);
d
:
ram_
3
d_vector
;
end record
;
type recarray y is s array
(0
to
3, 4
downto
1)
of rectype
;
signal recarrsig
:
recarray
;
signal recsig
:
rectype
;
Tosetthesecondelement(b)oftherecordrecsigtothestring"abc":
put recsig
.
b
(2:4)
abc
Tosetthefourbitwidevectorrepresentedbythecoordinates2,3,1inthethreedimensionalarraydinthe
record
recsig
to"0110":
put recsig
.
d
(2,3,1) 0110
Tosetthefirsttwobitsofthefourbitwidevectorrepresentedbythecoordinates2,3,1inthethreedimensional
arraydintherecord
recsig
to"01":
put recsig
.
d
(2,3,1)(1:2) 01
Tosetthefourbitwidevectorrepresentedbythecoordinates2,3,1inthethreedimensionalarraydintherecord
recsig
representedbythecoordinates2,2inthetwodimensionalarray
recarrsig
to"0011":
put recarrsig
(2,2).
d
(2,3,1)0011
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Chap
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ommands
qu
i
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ommand
The
quit
commandexitseitherthesimulationorthesoftware,dependingonthecommandoption.Withno
option,the
quit
commandclosestheISimsoftwareafterbeingpromptedtodoso(forgraphicuserinterface
(GUI)mode)orsimplyclosesISim(incommand-linemode).
No
t
e
Thiscommandiscasesensitive.
Thesyntaxforthiscommandisasfollows:
quit [option]
Op
t
i
ons
-
f
QuitsthecurrentsimulationandquitstheISimsoftware.Youarenot
promptedtosavethewaveconfigurationevenwhenchangeshavebeen
madetowaveconfigurations.
Theswitchhasnoeffectatthecommandline.
-
s
Quitsthecurrentsimulationwhilekeepingthegraphicaluserinterface
open.Atthispoint,ISimcanonlybeusedforloadingstaticwavedatabases
viaFile>OpentoopenaWDBfile.
Theswitchhasnoeffectatthecommandline.
Examp
l
es
TousethiscommandtoexitISimandleavetheTclprompt,type:
quit
TousethiscommandtoexitISimandsaveyourwaveform:
quit
-
f
Tousethiscommandtoquitthecurrentsimulation:
quit
-
s
Q
uit the e current t simulation
?
Yes
res
t
artC
ommand
The
restart
commandstopssimulationandsetssimulationtimebackto0.Thisenablesyoutostartsimulation
overagainwithinthesamesimulationrunwithoutreloadingthedesign. TheequivalentGUIcommand
isSimulation>Restart.
Specifically,
restart
resetsthefollowingcommandsettings:
onerror—Removesonerrorscript.
scope—Resetsscopeto/top.
saif—Closesfile.
vcd—Closesfile.
isimforce—Removesforce.
put—Returnstoinitialvalue.
No
t
e
Thiscommandiscasesensitive.
Thesyntaxforthiscommandisasfollows:
restart
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How to C#: Preview Document Content Using XDoc.Word
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Chap
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C
ommands
Examp
l
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Tousethiscommandtosetsimulationtimebackto0,andstartsimulation:
restart
resume
C
ommand
The
resume
commandisusedwiththe
onerror
commandtocontinueexecutingcommandsafteranerroris
encountered.
No
t
e
Thiscommandhasnoeffectwhenenteredalone.
No
t
e
Thiscommandiscasesensitive.
resume
wherenooptionsareavailable.
Examp
l
e
Inthisexample,ISimcontinuesreadingthenextcommandintheTclscriptaftershowingthetimetheerror
occurredandallvaluesinthecurrentscope.
onerror { show time
;
dump
;
resume }
r
un
C
ommand
The
run
commandstartssimulation. Withnooptions,the
run
commandrunssimulationfor100ns. The
equivalentGUIcommandsareSimulation>RunAllandSimulation>Run.
No
t
e
Thiscommandiscasesensitive.
Syn
t
ax
run [option]
Op
t
i
ons
all
RunssimulationuntiltherearenomoreeventsoruntilISimencountersa
breakpoint.SeebpCommandforinformationaboutsettingandremoving
breakpoints.
continue
ResumessimulationafterISimhasstoppedatabreakpoint.Thisoptionis
thesameasrunning
run all
.
<time> <unit>
Timeisthelengthoftimeyouwantsimulationtorun. Itcanbeanypositive
integerordecimal.
Unitistheunitoftime.Possiblevaluesare
fs
,
ps
,
ns
,
us
,
ms
and
sec
.
Defaultis
ps
.
Examp
l
es
The
run
commandcanbeusedasfollows.
TorunsimulationuntiltherearenomoreeventsoruntilISimreachesabreakpoint:
run all
Torunsimulationfor2000nanoseconds:
run
2000
ns
Torunsimulationfor1.2nanoseconds:
run
1.2
ns
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Chap
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ommands
Torunsimulationfor100ns.
run
sa
i
fC
ommand
The
saif
commandenablesyoutocreateaSwitchingActivityInterchangeformat(SAIF)fileandrecordport
andsignalswitchingrates. SeealsoWritingActivityDataoftheDesign.
No
t
e
Thiscommandiscasesensitive.
Thesyntaxforthiscommandisasfollows:
saif
<
option
>
Op
t
i
ons
open [
-
scope <path_name> > ] ] [
-
file
<file_name>] [
-
allnets]
open
willcreateafileforSAIFpowerestimation.
-
scope
<path_name>createspowerestimationdatastarting
atspecifiedscopeandrecursively.Youcanusearelative
path,oranabsolutepath.Ifnopathisspecified,thecurrent
scopeisused.
-
file
<file_name>createsanewSAIFfile.Thedefault
nameoftheSAIFfileis
xpower
.
saif
.OnlyoneSAIFfile
isallowedtobeopenedduringonerunofsimulation.
-
allnets
includesinternalnetsandportsignalsinthe
powerestimation.Withoutthisswitch,onlyportsignal
changesaremonitored.
close
StopsmonitoringandflushestheSAIFfile.
level <number_of_levels>
When
-
level
0
isused,signaltransitionsinalllevels
belowthespecifiedhierarchyaretracked.When
level
1
isused,onlythesignaltransitionsinthespecifiedhierarchy.
When
-
level
2
isused,signalsintwolevelsofhierarchy
aretrackedanddumped.
Examp
l
es
The
saif
commandcanbeusedasfollows.
Inthisexample,allportsofadesignstartingatthecurrentscoperecursivelyarewrittentoafilecalled
xpower
.
saif
.
saif open
Inthisexample,theportsandinternalnetsofadesignstartingatthecurrentscoperecursivelyarewritten
toafilecalled
xpower
.
saif
.
saif open
-
allnets
Inthisexample,portsandinternalnetsofadesignstartingat
uut
recursivelyarewrittentoafilecalled
uut_backward
.
saif
.
saif open
-
scope uut
-
file uut_backward
.
saif
-
allnets
scope
C
ommand
The
scope
commandenablesyoutonavigatethedesignhierarchy. Withnooption,the
scope
command
displaysthecurrentmoduleinformation.
No
t
e
Thiscommandiscasesensitive.
scope [option]
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Chap
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:
Us
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C
ommands
Op
t
i
ons
..
Movesthecurrentscopetothehierarchydirectlyabovethe
currentone.
<path_name>
Path_nameisthepathtothemoduleforwhichyouwant
todisplaythemoduleinformation.Youcanusearelative
path,oranabsolutepath.
Examp
l
es
The
scope
commandcanbeusedasfollows.
Tomoveuponelevelinthedesignhierarchy:
scope
..
TomovetothemoduleUUTthatisinstantiatedinthecurrentmodule:
scope UUT
TousethescopeTclcommandonchildinstancesinapostroutenetlist.
Forexample:
X_
IPAD
\
CLK/PAD (
.PAD(CLK)
);
where,
\
CLK/PAD
isanextendedidentifier.
Enter:
scope
/
testbench
/
UUT
/
\\
CLK/PAD
\
Noticethatyoumustuseabackslashbefore
\
CLK
andabackslashafter
PAD
attheveryend.
sd
f
anno
C
ommand
The
sdfanno
commandback-annotatesVITALdelaysfromanSDFfiletoaVHDLdesignthatismadeof
VITAL-compliantVHDLmodels.The
sdfanno
commandalsoback-annotatestothetimingspecifiedinspecify
blocksofVerilogmodules.
No
t
e
Thiscommandiscasesensitive.
Thesyntaxforthiscommandisasfollows.
sdfanno
(-
min |
-
typ |
-
max
) <
file_name
>
[option]
where
-
min |
-
typ |
-
max
andfile_namearerequired,andoptionisoptional.
Op
t
i
ons
(-
min |
-
typ |
-
max
)
Adelayswitchtype(
-
min
,
-
typ
or
-
max
)mustbespecifiedin
the
sdfanno
command.
-
min
-AnnotatesVHDL/Verilogfilewithfastestpossible
delayvalues.GivesyouaHoldTimetimingsimulation.
-
typ
-AnnotatesVHDL/Verilogfilewithtypicaldelay
values.
-
max
-AnnotatesVHDL/Verilogfilewithlongestpossible
delayvalues.GivesyouaSetupTimetimingsimulation.
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Chap
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C
ommands
<
file_name
>
NameoftheSDFfilethatcontainsthedelayinformation.A
filenamemustbespecifiedinthe
sdfanno
command.
-
nowarn
Thisoptionturnsoffwarningmessages.
-
noerror
Thisoptionturnserrormessagesintowarningmessages.This
allowsyoutocontinuesimulationeventhoughthereareerrors
inSDFback-annotation.
-
root <root_path>
Thisoptionspecifiestheplaceinthedesigntoapplyannotation.
ThepathsspecifiedintheSDFfilearerelativetotheplaceinthe
designhierarchyspecifiedbyroot_path.Bydefault,therootis
atthetoplevelofthedesign.
Examp
l
es
sd
f
anno-
t
ypExamp
l
es
Toannotatethesubmodule"subdesign"withthetypicaldelayvaluesfrom
mysubdesign
.
sdf
:
sdfanno
-
typ mysubdesign
.
sdf
-
root
/
subdesign
Toannotatethecurrenttop-leveldesignwiththetypicaldelayvaluesfrom
design
.
sdf
andignoreallerrors
orwarnings:
sdfanno
-
typ design
.
sdf
-
noerror
-
nowarn
sd
f
anno-m
i
nExamp
l
e
Toannotatethesubmodule"subdesign"withtheminimumdelayvaluesfrom
mysubdesign
.
sdf
:
sdfanno
-
min mysydesign
.
sdf
-
root
/
subdesign
sd
f
anno-maxExamp
l
e
Toannotatethecurrenttop-leveldesignwiththemaximumdelayvaluesfoundin
design
.
sdf
andignore
warnings:
sdfanno
-
max design
.
sdf
-
nowarn
show
C
ommand
The
show
commanddisplaysselectedaspectsofthedesign.
No
t
e
Thiscommandiscasesensitive.
show [option]
Op
t
i
ons
child | | child
-
r
Withoutthe
-
r
option,
child
displaysallofthechildren
blocks(onelevelonly)fromthecurrentblock.
child
-
r
option
recursivelylistsallchildrenblocks,includingthechildprocesses
fromthecurrentblock
constant
Listsallconstants,genericsandparameterswithinthecurrent
block.
driver
Displaystheprocessesthataredrivingthesignalspecifiedby
signal_name.Ifpossible,itprintsthelinenumbersoftheHDL
codethatiscontributingtothedriver.
load
Displaysalloftheloadforthesignalspecifiedbysignal_name.
port
Displaysalloftheportsignalswithinthecurrentblock.This
commandidentifiessignalsasinputsoroutputs.
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Chap
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C
ommands
scope
Displaysthecurrentscopeinthedesignhierarchy.Youcanonly
viewthehierarchylocation;youcannotalterit.Thiscommand
isidenticaltothescopecommandwithoutthepath_nameoption.
signal
Displaysallsignalswithinthecurrentmoduleincludingport
signals.
time
Displaysthesimulatorcurrenttime.
value <generic_name> > | | <parameter_name>
| <process_name>/<process_variable_name>
| <signal_name> > [element t reference,
element reference, , ...]
| <object>
[
-
radix
<
radix_type
>
]
<generic_name>isthenameoftheVHDLgenerictobequeried.
<parameter_name>isthenameoftheVHDLparametertobe
queried.
<process_name/process_variable_name>isthenameoftheprocess
andprocessvariabletobequeried. Toquerythevalueofa
processvariable,youmustalsosupplythenameoftheprocess
thatcontainsthevariable. Theprocessnameandprocess
variablenamesmustbeseparatedby"/".
<signal_name>-Nameofthesignalorbustobequeried. This
canalsobethenameofanarrayofsignals/buses,anarrayof
recordscontainingsignalsandbusesorarecordofarraysof
buses/signals.
Usea"."toseparatetherecordhierarchy,asin:
show value recsig
.
c
Usea"/"todelimitthehierarchicalnameofthesignalto
queryavaluetoasignalonalowerlevelofhierarchy,asin:
show value mymod
/
mysig
[elementreference]referstothedifferentwaysinwhichthe
sub-elementsofthesignalnamecanbereferencedwhenused
withthe
show
command.Thisprovidestheabilitytofurther
refinethesignalsbyreferencingtheindividualsub-elementsofa
signal.PleaseseetheExamplesbelowformoreinformation.
twointegersseparatedbyacolon,enclosedinparenthesis,
displaysarangeofvaluesinthevectorspecifiedby
signal_name. Forexample:
show value
(3:0)
oneormoreintegersseparatedbycommas,enclosed
byparenthesis,displaysthevaluesofelementsina
multidimensionalarrayspecifiedbysignal_name. For
example:
show value
(2,3)
<object>[
-
radix
<radix_type>]displaysvalueswiththespecified
radix. For<object>,settheHDLobjectdatatype.Thesupported
radixtypesare
default
,
dec
,
bin
,
oct
,
hex
,
unsigned
and
ascii
.Whennoradixtypeisspecified,theglobalradixtypeset
withthe
isim set t radix command
isused,orifnoneisset
there,
default
isusedasradix.
variable
Displaysallofthevariableswithinthecurrentblock.Tosee
variableswithinaVHDLprocess,use
scope
tonavigatetothe
VHDLprocessandthenrun
show variable
.
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Chap
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C
ommands
Examp
l
es
Show
C
h
il
d
Ifyouarelocatedatthetoplevelofthehierarchyinadesigncalled
fifo_controller
andenter
show child
.
Thefollowinghierarchyinformationdisplays:
B
lock
N
ame
: <
fifo_controller
>
Enter
show child
-
r
forthesamelevelofthedesign,thecurrentandrecursivehierarchyinformation
displays.
Show
Dr
i
ver
Ifyouarelocatedatthetoplevelofthehierarchyinadesigncalled
fifo_count
andenter
show driver
fifocount
.Thefollowinginformationdisplaysforthesignal
fifocount
:
<D
river for r fifocount
>
fifoctlr_cc_v
2.
v
:221
Thenumber221attheendofthelinesreferstothecodelineinthesourcefile.
ShowLoad
Ifyouarelocatedatthetoplevelofthehierarchyinadesigncalled
fifo_count
andenter
show load
fifocount
.Thefollowinginformationdisplaysforthesignal
fifocount
:
<L
oad for fifocount
>
S
ignal
<H
ex
(0)> (B
lock
:
fifo_count
/L
sbled
/)
S
ignal
<H
ex
(1)> (B
lock
:
fifo_count
/L
sbled
/)
S
ignal
<H
ex
(2)> (B
lock
:
fifo_count
/L
sbled
/)
S
ignal
<H
ex
(3)> (B
lock
:
fifo_count
/L
sbled
/)
ShowScope
Ifyouarelocatedatthetoplevelofthehierarchyinadesigncalled
fifo_count
andenter
show scope
.The
followinginformationdisplays:
<B
lock
> /
tb_cc_func
/
ShowS
i
gna
l
Va
l
ue
Toqueryavaluetoasignalcalledclk:
show value clk
Toqueryavaluetoa4-bitbuscalledbusx:
show value busx
Toquerythevalueofaddr:
show value addr
Displays
0111010101011101
.
show value addr
-
radix hex
Displays
755D
.
show value addr
-
radix dec
Displays
30045
.
ShowOb
j
ec
t
Va
l
ue
Thefollowingexamplesrefertoastandardlogicvectorcalled
sigx
thatisdeclaredasfollows:
signal sigx
:
std_logic_vector
(0
to
5);
Toquerybit0of
sigx
:
I
S
i
mUser
G
u
i
de
U
G
660(v11.
3
)
Sep
t
ember16,2
00
9
www.x
ili
nx.com
10
9
Chap
t
er 10
:
Us
i
ng Tc
l
S
i
mu
l
a
t
i
on
C
ommands
show value sigx
(0)
Toqueryslice1to2of
sigx
:
show value sigx
(1:2)
Toqueryallof
sigx
:
show value sigx
ShowVa
l
ueo
f
A
rrayo
f
Ob
j
ec
t
s
Thefollowingexamplesrefertoanarrayofstandardlogicvectorsthatisdeclaredasfollows:
signal sigarray
:
vectorarray
(0
to
5, 1
to
4, 2
to
6);
Toqueryeverybitofavectorarrayelementof
sigarray
:
show value sigarray
(0,1,2)
Toquerythefirsttwobitsofeacharrayelementof
sigarray
:
show value sigarray
(0,1,2)(1:2)
Toquerybitsthreeofeacharrayelementof
sigarray
:
show value sigarray
(0,1,2)(3)
Foranarrayofrecordswhichinturncontainsanarrayofstandardlogicvectorsthatisdeclaredasfollows:
type
ram_
3
d_vector is array
(0
to
10, 7
downto
0, 0
to
2)
of std_logic_vector
(1
to
4);
type
rectype is record
a
:
integer
;
b
:
string
(1
to
7);
c
:
std_logic_vector
(0
to
3);
d
:
ram_
3
d_vector
;
end record
;
type
recarray is s array
(0
to
3, 4
downto
1)
of rectype
;
signal recarrsig
:
recarray
;
signal recsig
:
rectype
;
Toquerythesecondelement(
b
)oftherecord
recsig
:
show value recsig
.
b
(2:4)
Toquerythefourbitwidevectorrepresentedbythecoordinates2,3,1inthethreedimensionalarray
d
in
therecord
recsig
:
show value recsig
.
d
(2,3,1)
Toquerythefirsttwobitsofthefourbitwidevectorrepresentedbythecoordinates2,3,1inthethreedimensional
array
d
intherecord
recsig
:
show value recsig
.
d
(2,3,1)(1:2)
Toquerythefourbitwidevectorrepresentedbythecoordinates2,3,1inthethreedimensionalarray
d
inthe
record
recsig
representedbythecoordinates2,2inthetwodimensionalarray
recarrsig
:
show value recarrsig
(2,2).
d
(2,3,1)
I
S
i
m User
G
u
i
de
110
www.x
ili
nx.com
U
G
660(v11.
3
)
Sep
t
ember16,2
00
9
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