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1
FEATURES
APPLICATIONS
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
5
6
7
8
9
10
11
12
TPS2223A, TPS2224A
DB OR PWP PACKAGE
(TOP VIEW)
5V
5V
DATA
CLOCK
LATCH
NC
12V
²
AVPP
AVCC
AVCC
GND
RESET
5V
NC
NC
SHDN
12V²
BVPP
BVCC
BVCC
NC
OC
3.3V
3.3V
NC
No
internal
connection
²
Pin 7 and 20 are NC for TPS2223A.
DESCRIPTION
TPS2220A, TPS2223A
TPS2224A, TPS2226A
SLVS428E–MAY2002–REVISED MSRCH 2008
www.t
i
.com
CARDBUSPOWER-INTERFACESWITCHES
FORSERIALPCMCIACONTROLLERS
• NotebookandDesktopComputers
234
• ProvidesS-CARDandM-CARDPower
Management for CableCARD™ Applications
• BarCodeScanners
• DigitalCameras
• Single-SlotSwitch:TPS2220A
Dual-Slot Switches: TPS2223A, TPS2224A,
• Set-TopBoxes
TPS2226A
• PDAs
• FastCurrentLimitResponseTime
• FullyIntegratedVCCandVPPSwitchingfor
3.3 V, 5 V, and 12 V (no 12 V on TPS2223A)
• MeetsCurrentPCCard™Standards
• V
pp
Output Selection Independent of V
CC
• 12-Vand5-VSuppliesCanBeDisabled
• TTL-LogicCompatibleInputs
• Short-CircuitandThermalProtection
• 24-PinHTSSOP,24-or30-PinSSOP
• 140-mA(Typical)QuiescentCurrentfrom
3.3-V Input
• Break-Before-MakeSwitching
• Power-OnReset
• –40°Cto85°COperatingAmbientTemperature
Range
The TPS2223A, TPS2224A, and TPS2226A CardBus™ power-interface switches provide an integrated
power-management solution for two PC Card sockets. The TPS2220A is a single-slot option for this family of
devices. These devices allow the controlled distribution of 3.3 V, 5 V, and 12 V to each card slot. The
current-limiting and thermal-protection features eliminate the need for fuses. Current-limit reporting helps the user
isolate a system fault. The switch r
DS(on)
and current-limit values have been set for the peak and average current
requirements stated in the PC Card specification, and optimized for cost. A faster maximum current limit
response time is the only difference between the TPS2223A, TPS2224A, and TPS2226A and the TPS2223,
TPS2224, and TPS2226.
Like the TPS2214 and TPS2214A and the TPS2216 and TPS2216A, this family of devices supports independent
VPP/VCC switching; however, the standby and interface-mode pins are not supported. Shutdown mode is now
supported independently on SHDN as well as in the serial interface. Optimized for lower power implementation,
the TPS2223A does not support 12-V switching to VPP. For the most current package and ordering information,
see thePackageOptionAddendum at the end of this document, or see the TI website atwww.ti.com.
1
Please be aware that an important notice concerning availability, standard warranty, and use in criticalapplications of
TexasInstrumentssemiconductor products and disclaimersthereto appearsat the end of this data sheet.
2
CableCARD isa trademarkof Cable Tevelision Laboratories, Inc..
3
PC Card, CardBus are trademarks of PCMCIA (Personal Computer MemoryCard International Association).
4
All othertrademarks are the property of their respective owners.
PRODUCTION DATAinformationis currentas ofpublicationdate.
Copyright© 2002–2008,Texas InstrumentsIncorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarilyincludetestingofall parameters.
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ABSOLUTE MAXIMUM RATINGS
DISSIPATION RATING TABLE
RECOMMENDED OPERATING CONDITIONS
TPS2220A,TPS2223A
TPS2224A,TPS2226A
SLVS428E–MAY2002–REVISED MSRCH 2008
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage orhandling to prevent electrostatic damage to the MOSgates.
over operating free-air temperature range (unless otherwise noted)
(1)
TPA222xA
UNIT
V
I(3.3V)
–0.3 to 5.5
V
V
I
Input voltage range for card power
V
I(5V)
–0.3 to 5.5
V
V
I(12V)
(2)
–0.3 to 14
V
Logic input/output voltage
–0.3 to 6
V
V
O(xVCC)
–0.3 to 6
V
V
O
Output voltage
V
O(xVPP)
–0.3 to 14
V
Continuous totalpower dissipation
See Dissipation Rating Table
I
O(xVCC)
InternallyLimited
I
O
Output current
I
O(xVPP)
InternallyLimited
T
J
Operating virtual junction temperature range
–40 to 100
°C
T
stg
Storage temperature range
–55 to 150
°C
OC sinkcurrent
10
mA
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stressratings
only, and functional operation of the device at these orany otherconditions beyond those indicated under"recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions forextended periods may affect device reliability.
(2) Not applicable for TPS2223A
T
A
25°C
DERATINGFACTOR
T
A
=70°C
T
A
=85°C
PACKAGE
(1)
POWER RATING
ABOVET
A
=25°C
POWER RATING
POWER RATING
24
890 mW
8.9 mW/°C
489 mW
356 mW
DB
30
1095 mW
10.95 mW/°C
602 mW
438 mW
PWP
24
3322 mW
33.22 mW/°C
1827 mW
1329 mW
(1) These devicesare mounted on an JEDEC low-k board (2-oz. traces on surface).
MIN
MAX
UNIT
V
I(3.3V)
(1)
3
3.6
Input voltage, V
I(3.3V)
isrequired forallcircuit
operations. 5Vand 12Vare onlyrequired for V
I(5V)
3
5.5
V
their respective functions.
V
I(12V)
(2)
7
13.5
I
O(xVCC)
at T
J
=100°C
1
A
I
O
Output current
I
O(xVPP)
at T
J
=100°C
100
mA
f
(clock)
Clock frequency
2.5
MHz
Data
200
Latch
250
t
w
Pulse duration
ns
Clock
100
Reset
100
t
h
Data-to-clock hold time (seeFigure2)
100
ns
t
su
Data-to-clock setup time (seeFigure2)
100
ns
t
d(latch)
Latch delay time (seeFigure2)
100
ns
t
d(clock)
Clock delaytime (seeFigure2)
250
ns
(1) It is understood that for V
I(3.3V)
<3 V, voltages within the absolute maximum ratings applied to pin 5Vor pin 12Vdo not damage the IC.
(2) Not applicable for TPS2223A
2
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Copyright© 2002–2008,Texas InstrumentsIncorporated
Product FolderLink(s):TPS2220A TPS2223ATPS2224A A TPS2226A
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ELECTRICAL CHARACTERISTICS
TPS2220A, TPS2223A
TPS2224A, TPS2226A
SLVS428E–MAY2002–REVISED MSRCH 2008
RECOMMENDED OPERATING CONDITIONS (continued)
MIN
MAX
UNIT
Operating virtualjunction temperature (maximum to be calculated at worst case P
D
at 85°C
T
J
–40
100
°C
ambient)
T
J
=25°C, V
I(5V)
=5 V, V
I(3.3V)
=3.3 V, V
I(12V)
=12 V (not applicable for TPS2223A), all outputs unloaded (unless otherwise
noted)
PARAMETER
TEST CONDITIONS
(1)
MIN
TYP
MAX
UNIT
POWERSWITCH
I
O
=750mAeach
85
110
3.3VtoxVCC
(2)
I
O
=750mAeach,T
J
=100°C
110
140
m
I
O
=500mAeach
95
130
5VtoxVCC
(2)
I
O
=500mAeach,T
J
=100°C
120
160
Static drain-source
r
DS(on)
on-stateresistance
I
O
=50mAeach
0.8
1
3.3Vor5VtoxVPP
(2)
I
O
=50mAeach,T
J
=100°C
1
1.3
I
O
=50mAeach
2
2.5
12VtoxVPP
(2)
I
O
=50mAeach,T
J
=100°C
2.5
3.4
Dischargeat xVCC
I
O(disc)
=1mA
0.5
0.7
1
Outputdischarge
k
resistance
Dischargeat xVPP
I
O(disc)
=1mA
0.2
0.4
0.5
I
OS(xVCC)
1
1.4
2
A
Limit (steady-statevalue),output
poweredintoashortcircuit
I
OS(xVPP)
120
200
300
mA
I
OS
Short-circuitoutput current
Limit (steady-statevalue),output
I
OS(xVCC)
1
1.4
2
A
poweredintoashortcircuit,
I
OS(xVPP)
120
200
300
mA
T
J
=100°C
Thermaltrippoint
Risingtemperature
135
Thermalshutdown
T
J
°C
temperature
(2)
Hysteresis
10
5VtoxVCC =5V, with100-m
shorttoGND
10
Current-limitresponsetime
(3)(4)
ms
5VtoxVPP=5V, with100-m
shorttoGND
3
I
I(3.3V)
140
200
Normal
V
O
(xVCC)=V
O
(xVPP)= 3.3Vand
I
I(5V)
8
12
operation
alsoforRESET= 0V
I
I(12V)
100
180
I
I
Inputcurrent, quiescent
mA
I
I(3.3V)
0.3
2
Shutdownmode
I
I(5V)
V
O
(xVCC)=V
O
(xVPP)= Hi-z
0.1
2
I
I(12V)
0.3
2
10
V
O(xVCC)
=5V, V
I(5V)
=V
I(12V)
=0V
T
J
=100°C
50
Leakagecurrent,
I
lkg
Shutdownmode
mA
outputoffstate
10
V
O(xVPP)
=12V,V
I(5V)
=V
I(12V)
=0V
T
J
=100°C
50
(1) Pulse-testing techniquesmaintain junction temperature close to ambient temperature; thermaleffects must be taken into account
separately.
(2) TPS2223A, TPS2224A, TPS2226A: two switches on. TPS2220A: one switch on.
(3) Specified bydesign; not tested in production.
(4) From application of short to 110% of final current limit.
Copyright ©2002–2008,TexasInstrumentsIncorporated
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3
Product FolderLink(s):TPS2220A TPS2223ATPS2224A A TPS2226A
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TPS2220A,TPS2223A
TPS2224A,TPS2226A
SLVS428E–MAY2002–REVISED MSRCH 2008
ELECTRICAL CHARACTERISTICS (continued)
T
J
=25°C, V
I(5V)
=5 V, V
I(3.3V)
=3.3 V, V
I(12V)
=12 V (not applicable for TPS2223A), all outputs unloaded (unless otherwise
noted)
PARAMETER
TEST CONDITIONS
(1)
MIN
TYP
MAX
UNIT
LOGICSECTION (CLOCK,DATA, LATCH, RESET,SHDN, OC)
RESET =5.5V
-1
1
I
I(/RESET)
(5)
RESET =0V
-30
-20
-10
SHDN=5.5V
-1
1
I
I(/SHDN)
(5)
I
I
Inputcurrent, logic
SHDN=0V
-50
-3
mA
LATCH= 5.5V
50
I
I(LATCH)
(5)
LATCH= 0V
-1
1
I
I(CLOCK,DATA)
0Vto5.5V
-1
1
V
IH
High-levelinput voltage,logic
2
V
V
IL
Low-levelinput voltage,logic
0.8
V
V
O(sat)
Outputsaturationvoltageat OC
I
O
=2mA
0.14
0.4
V
I
lkg
LeakagecurrentatOC
V
O(/OC)
=5.5V
0
1
mA
UVLOAND POR (POWER-ONRESET)
V
I(3.3V)
Inputvoltageat 3.3Vpin,UVLO
3.3-Vlevelbelowwhichallswitches areHi-Z
2.4
2.7
2.9
V
V
hys(3.3V)
UVLOhysteresis voltageatVA
(6)
100
mV
V
I(5V)
Inputvoltageat 5Vpin, UVLO
5-Vlevelbelowwhichonly5Vswitches areHi-Z
2.3
2.5
2.8
V
Delay fromvoltagehit (stepfrom 3Vto2.3V)to
V
hys(5V)
UVLOhysteresis voltageat5V
(6)
100
mV
Hi-Zcontrol(90%V
G
toGND)
t
df
Delaytimeforfallingresponse,UVLO
(6)
4
ms
3.3-VvoltagebelowwhichPOR isassertedcausinga
V
I(POR)
Inputvoltage, power-onreset
(6)
RESET internallywithalllineswitchesopenandall
1.7
V
dischargeswitches closed.
(5) LATCH haslow-current pulldown. RESET and SHDNhave low-current pullup.
(6) Specified bydesign; not tested in production.
4
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Copyright© 2002–2008,Texas InstrumentsIncorporated
Product FolderLink(s):TPS2220A TPS2223ATPS2224A A TPS2226A
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SWITCHING CHARACTERISTICS
TPS2220A, TPS2223A
TPS2224A, TPS2226A
SLVS428E–MAY2002–REVISED MSRCH 2008
V
CC
=5 V, T
A
=25°C, V
I(3.3V)
=3.3 V, V
I(5V)
=5 V, V
I(12)
=12 V (not applicable for TPS2223A) all outputs unloaded (unless
otherwise noted)
PARAMETER(1)
LOADCONDITION
TEST CONDITIONS(2)
MIN
TYP MAX
UNIT
V
O(xVCC)
=5 V
0.9
C
L(xVCC)
=0.1 mF, C
L(xVPP)
=0.1 mF,
I
O(xVCC)
=0 A, I
O(xVPP)
=0 A
V
O(xVPP)
=12 V
0.26
t
r
Output rise times(3)
ms
V
O(xVCC)
=5 V
1.1
C
L(xVCC)
=150 mF, C
L(xVPP)
=10 mF,
I
O(xVCC)
=0.75 A, I
O(xVPP)
=50 mA
V
O(xVPP)
=12 V
0.6
V
O(xVCC)
=5 V,
0.5
Discharge switchesON
C
L(xVCC)
=0.1 mF, C
L(xVPP)
=0.1 mF,
I
O(xVCC)
=0 A, I
O(xVPP)
=0 A
V
O(xVPP)
=12 V,
0.2
t
f
Output fall times
(3)
ms
Discharge switchesON
V
O(xVCC)
=5 V
2.35
C
L(xVCC)
=150 mF, C
L(xVPP)
=10 mF,
I
O(xVCC)
=0.75 A, I
O(xVPP)
=50 mA
V
O(xVPP)
=12 V
3.9
t
pdon
2
Latch
to xVPP(12V)
(4)
t
pdoff
0.62
t
pdon
0.77
Latch
to xVPP(5V)
t
pdoff
0.51
t
pdon
0.75
C
L(xVCC)
=0.1 mF, C
L(xVPP)
=0.1 mF,
Latch
to xVPP(3.3V)
ms
I
O(xVCC)
=0 A, I
O(xVPP)
=0 A
t
pdoff
0.52
t
pdon
0.3
Latch
to xVCC(5V)
t
pdoff
2.5
t
pdon
0.3
Latch
to xVCC(3.3V)
t
pdoff
2.8
Propagation delay
t
pd
times
(3)
t
pdon
2.2
Latch
to xVPP(12V)
(4)
t
pdoff
0.8
t
pdon
0.8
Latch
to xVPP(5V)
t
pdoff
0.6
t
pdon
0.8
C
L(xVCC)
=150 mF, C
L(xVPP)
=10 mF,
Latch
to xVPP(3.3V)
ms
I
O(xVCC)
=0.75 A, I
O(xVPP)
=50 mA
t
pdoff
0.6
t
pdon
0.6
Latch
to xVCC(5V)
t
pdoff
2.5
t
pdon
0.5
Latch
to xVCC(3.3V)
t
pdoff
2.6
(1) Refer to Parameter Measurement Information inFigure1.
(2) No card inserted, assumes a 0.1-mF output capacitor (seeFigure1).
(3) Specified bydesign; not tested in production.
(4) Not applicable for TPS2223A
Copyright ©2002–2008,TexasInstrumentsIncorporated
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CS
CS
S1
S4
CS
S7
CS
S11
Control Logic
SHDN
RESET
DATA
CLOCK
LATCH
OC
GND
UVLO
POR
Current Limit
Thermal Limit
S2
S5
S3
S6
S8
S9
S10
S12
S13
S14
Discharge
Element
13
14
3.3 V
3.3 V
Power
Inputs
3.3V
1
2
24
5 V
5 V
5 V
Power
Inputs
5V
7
12 V
Power
Inputs
12V
20
12 V
21
12
3
4
5
15
9
10
AVCC
AVCC
17
18
BVCC
BVCC
8
AVPP
19
BVPP
11
Power Outputs
NOTES:A. Diagram shown for 24-pin DB package.
B. Current sense
C. The two 12-V pins must be externally connected.
D. No connections for TPS2223A.
See Note B
See Note B
See Note B
See Note B
See Note C
See Note C
See Note C
See Note D
TPS2220A,TPS2223A
TPS2224A,TPS2226A
SLVS428E–MAY2002–REVISED MSRCH 2008
FUNCTIONAL BLOCK DIAGRAM OF TPS2223A, TPS2224A and TPS2226A (see Note A)
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See Note A
See Note A
CS
S1
CS
S7
Control Logic
SHDN
RESET
DATA
CLOCK
LATCH
OC
GND
UVLO
POR
Current Limit
Thermal Limit
S2
S3
S4
S5
S6
3.3 V
5 V
5 V
12 V
AVCC
AVCC
AVPP
See Note B
NOTES:A. Current sense
B. The two 12-V pins must be externally connected.
12 V
See Note B
PIN ASSIGNMENTS
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
5
6
7
8
9
10
11
12
TPS2220A
DB OR PWP PACKAGE
(TOP VIEW)
5V
5V
DATA
CLOCK
LATCH
NC
12V
AVPP
AVCC
AVCC
GND
RESET
NC
NC
NC
SHDN
12V
NC
NC
NC
NC
OC
NC
3.3V
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
1
2
3
5
6
7
8
9
10
11
12
13
14
15
TPS2226A
DB PACKAGE
(TOP VIEW)
5V
5V
DATA
CLOCK
LATCH
NC
12V
AVPP
AVCC
AVCC
AVCC
GND
NC
RESET
3.3V
5V
NC
NC
NC
NC
SHDN
12V
BVPP
BVCC
BVCC
BVCC
NC
OC
3.3V
3.3V
NC
-
No
internal
connection
TPS2220A, TPS2223A
TPS2224A, TPS2226A
SLVS428E–MAY2002–REVISED MSRCH 2008
FUNCTIONAL BLOCK DIAGRAM OF TPS2220A
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TPS2220A,TPS2223A
TPS2224A,TPS2226A
SLVS428E–MAY2002–REVISED MSRCH 2008
Terminal Functions
TERMINAL
NO.
I/O
DESCRIPTION
NAME
TPS2220A TPS2223A TPS2224A TPS2226A
3.3V
13
13, 14
13, 14
15, 16, 17
I
3.3-Vinput forcard power and chip power
5V
1, 2
1, 2, 24
1, 2, 24
1, 2, 30
I
5-V input for card power
12-Vinput forcard power (xVPP). The two 12-V pinsmust be
12V
7, 20
NA
7, 20
7, 24
I
externally connected.
Switched output that delivers 3.3 V, 5 V, ground or high impedance to
AVCC
9, 10
9, 10
9, 10
9, 10, 11
O
card
Switched output that delivers 3.3 V, 5 V, 12 V, ground or high
AVPP
8
8
8
8
O
impedance to card (12 Vnot applicable to TPS2223A)
Switched output that delivers 3.3 V, 5 V, ground or high impedance to
BVCC
17, 18
17, 18
20, 21, 22
O
card
Switched output that delivers 3.3 V, 5 V, 12 V, ground or high
BVPP
19
19
23
O
impedance to card (12 Vnot applicable for TPS2223A)
GND
11
11
11
12
Ground
Open-drain overcurrent reporting output that goes low when an
OC
15
15
15
18
O
overcurrent condition exists. An external pullup isrequired.
Hi-Z (open) all switches. Identical function to serialD8. Asynchronous
SHDN
21
21
21
25
I
active-low command, internal pullup
Logic-level RESET input active low. Asynchronous active-low
RESET
12
12
12
14
I
command, internal pullup
CLOCK
4
4
4
4
I
Logic-level clockfor serial data word
DATA
3
3
3
3
I
Logic-level serial data word
LATCH
5
5
5
5
I
Logic-level latch forserial data word, internalpulldown
6, 14, 16,
6, 13, 19,
6, 7, 16,
6, 16, 22,
NC
17, 18, 19,
26, 27, 28,
No internal connection
20, 22, 23
23
22, 23, 24
29
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PARAMETER MEASUREMENT INFORMATION
50%
LATCH
V
DD
GND
10%
90%
t
pd(on)
GND
V
O(xVPP)
Propagation Delay (xVPP)
50%
LATCH
V
DD
GND
10%
90%
t
pd(on)
GND
V
O(xVCC)
Propagation Delay (xVCC)
10%
90%
t
r
GND
V
O(xVPP)
Rise/Fall Time (xVPP)
t
f
10%
90%
t
r
GND
V
O(xVCC)
Rise/Fall Time (xVCC)
t
f
50%
V
DD
GND
10%
90%
t
on
GND
V
O(xVCC)
Turnon/off Time (xVCC)
xVPP
VOLTAGE WAVEFORMS
LOAD CIRCUIT (xVPP)
I
O(xVPP)
xVCC
50%
LATCH
V
DD
GND
10%
90%
t
on
GND
V
O(xVPP)
Turnon/off Time (xVPP)
I
O(xVCC)
t
pd(off)
t
pd(off)
t
off
t
off
LOAD CIRCUIT (xVCC)
V
I(12V/5V/3.3V)
V
I(5V/3.3V)
V
I(12V/5V/3.3V)
V
I(5V/3.3V)
V
I(12V/5V/3.3V)
V
I(5V/3.3V)
LATCH
D10
D9
D8
D7
D6
D5
D4
D3
D2
DATA
LATCH
CLOCK
D1
D0
Data Setup Time
Data Hold Time
Latch Delay Time
Clock Delay Time
TPS2220A, TPS2223A
TPS2224A, TPS2226A
SLVS428E–MAY2002–REVISED MSRCH 2008
Figure 1. Test Circuits and Voltage Waveforms
NOTE: Data isclocked in on the positive edge of the clock. The positive edge of the latch signal should occur before the next
positive edge of the clock. For definition of D0 to D10, see the controllogictable.
Figure 2. Serial-Interface Timing for TPS2226A
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Table of Graphs
1
2
3
4
5
t − Time − ms
0
V
O(/OC)
2 V/div
I
O(xVPP)
2 A/div
100
200
300
400
500
t − Time − ms
0
V
O(/OC)
5 V/div
I
O(VCC)
5 A/div
V
IN(5V)
2 V/div
TPS2220A,TPS2223A
TPS2224A,TPS2226A
SLVS428E–MAY2002–REVISED MSRCH 2008
PARAMETER MEASUREMENT INFORMATION (continued)
FIGURE
Short-circuit response, short applied to powered-on 5-VxVCC-switch output vsTime
3
Short-circuit response, short applied to powered-on 12-VxVPP-switch output vsTime
4
OC response with ramped overcurrent-limit load on 5-V xVCC-switch output
vsTime
5
OC response with ramped overcurrent-limit load on 12-V xVPP-switch output
vsTime
6
xVCC Turnon propagation delaytime
L
=150 mF)
vsJunction temperature
7
xVCC Turnoff propagation delaytime
L
=150 mF)
vsJunction temperature
8
xVPPTurnon propagation delaytime
L
=10 mF)
vsJunction temperature
9
xVPPTurnoff propagation delaytime
L
=10 mF)
vsJunction temperature
10
xVCC Turnon propagation delaytime (T
J
=25°C)
vsLoad capacitance
11
xVCC Turnoff propagation delaytime (T
J
=25°C)
vsLoad capacitance
12
xVPPTurnon propagation delaytime (T
J
=25°C)
vsLoad capacitance
13
xVPPTurnoff propagation delaytime (T
J
=25°C)
vsLoad capacitance
14
xVCC Rise time
L
=150 mF)
vsJunction temperature
15
xVCC Falltime
L
=150 mF)
vsJunction temperature
16
xVPPRise time
L
=10 mF)
vsJunction temperature
17
xVPPFalltime
L
=10 mF)
vsJunction temperature
18
xVCC Rise time (T
J
=25°C)
vsLoad capacitance
19
xVCC Falltime (T
J
=25°C)
vsLoad capacitance
20
xVPPRise time (T
J
=25°C)
vsLoad capacitance
21
xVPPFall time (T
J
=25°C)
vsLoad capacitance
22
SHORT-CIRCUIT RESPONSE,
SHORT-CIRCUIT RESPONSE,
SHORT APPLIED TO POWERED-ON 5-V
SHORT APPLIED TOPOWERED-ON 12-V
xVCC-SWITCH OUTPUT
xVPP-SWITCH OUTPUT
Figure 3.
Figure 4.
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